Socfpga Gen5 uses ad-hoc code to unreset the ETH MACs and set their PHY mode.
Change this to use the designware_socfpga net driver and remove the old ad-hoc code.
Simon Goldschmidt (3): net: designware: socfpga: adapt to Gen5 arm: socfpga: gen5 enable designware_socfpga arm: socfpga: gen5: remove hacked ETH RST handling
.../mach-socfpga/include/mach/reset_manager.h | 2 - arch/arm/mach-socfpga/misc.c | 65 ------------------- arch/arm/mach-socfpga/misc_gen5.c | 44 +------------ configs/socfpga_arria5_defconfig | 3 + configs/socfpga_cyclone5_defconfig | 3 + configs/socfpga_dbm_soc1_defconfig | 3 + configs/socfpga_de0_nano_soc_defconfig | 3 + configs/socfpga_de10_nano_defconfig | 3 + configs/socfpga_de1_soc_defconfig | 3 + configs/socfpga_is1_defconfig | 3 + configs/socfpga_sockit_defconfig | 3 + configs/socfpga_socrates_defconfig | 3 + configs/socfpga_sr1500_defconfig | 3 + configs/socfpga_vining_fpga_defconfig | 3 + drivers/net/dwmac_socfpga.c | 14 ++-- 15 files changed, 43 insertions(+), 115 deletions(-)