On 06/05/2015 02:59 AM, Priyanka Jain wrote:
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIUSigned-off-by: Priyanka Jain Priyanka.Jain@freescale.com Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@freescale.com Signed-off-by: Wang Dongsheng dongsheng.wang@freescale.com
changes from v2:
- adds SGMII suport using CPLD
- removes extra endif
changes from v3:
- removes checkpatch error
changes from v4:
- wrong use of defined MACRO in eth.c file, adds macro properly
changes from v5:
- updates README files, t1040d4_rcw.cfg and t1042d4_rcw.cfg
- update DDR settings
changes from v6:
- update DDR settings, config files, cpld code, README
- Add QGMII phy addr configs, update DIU_SEL value
Applied to u-boot-mpc85xx master after adding CONFIG_SPI_FLASH to defconfig, the same as your v8 patch.
Thanks.
York