Hi Sean
On Wed, Apr 22, 2020 at 10:03:41PM -0400, Sean Anderson wrote:
On 4/22/20 9:51 PM, Rick Chen wrote:
Hi Sean
Hi Sean
This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar.
Known Bugs/Limitations:
- Accessing the AI ram hangs, limiting available ram to 6M
- Trying to boot an image with bootm fails with ERROR: Failed to allocate 0x7d60 bytes below 0x80000000.
To flash u-boot to a maix bit, run kflash -tp /dev/<your tty here> -B bit_mic u-boot-dtb.bin
Boot output should look like the following:
U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
DRAM: 8 MiB In: serial@38000000 Out: serial@38000000 Err: serial@38000000 =>
Changes for v8:
- Removed dependency on the patch "clk: Add functions to register CCF clock structs". Hopefully this will make reviewing easier.
I have applied this patch series to u-boot-riscv/master except [PATCH v8 14/21] riscv: Clean up IPI initialization code. Because it will cause some warnings as below:
arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi': arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes integer from pointer without a cast [-Wint-conversion] int ret = syscon_get_first_range(RISCV_SYSCON_PLIC); ^~~~~~~~~~~~~~~~~~~~~~ arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion] if (IS_ERR(ret)) ^~~ In file included from arch/riscv/lib/andes_plic.c:20:0: include/linux/err.h:34:20: note: expected 'const void *' but argument is of type 'int' static inline long IS_ERR(const void *ptr) ^~~~~~ arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion] return PTR_ERR(ret); ^~~ In file included from arch/riscv/lib/andes_plic.c:20:0: include/linux/err.h:29:20: note: expected 'const void *' but argument is of type 'int' static inline long PTR_ERR(const void *ptr) ^~~~~~~ arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer from integer without a cast [-Wint-conversion] gd->arch.plic = ret;
after running CI yesterday, it failed in many cases: https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
and I trace at least two cases belong to your patch 49.59 https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
arning, treated as error: /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error in "code-block" directive: 1 argument(s) required, 0 supplied. .. code-block:: &sysclk { assigned-clocks = <&sysclk K210_CLK_PLL0>; assigned-clock-rates = <800000000>; }; doc/Makefile:69: recipe for target 'htmldocs' failed make[1]: *** [htmldocs] Error 1
I used to have
.. code-block:: dts
but it warned that "dts" was not a valid language, so I dropped it.
49.66 https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
./tools/patman/patman --test && ./tools/buildman/buildman -t && ./tools/dtoc/dtoc -t && make testconfig; fi; fi cp: cannot create regular file '/home/travis/build/rickchen36/sandbox/': Not a directory cp: cannot create regular file '/home/travis/build/rickchen36/sandbox/': Not a directory WARNING: no status info for 'sipeed_maix_bitm' WARNING: no maintainers for 'sipeed_maix_bitm'
I'm not sure what the issue here is. Which specific files are lacking a MAINTAINERS entry?
configs/sipeed_maix_bitm_defconfig isn't listed in any MAINTAINERS file.
[snip]
These "errors" seem rather minor. I will fix the PLIC ones in the next revision, but I don't think the sort found in this email are particularly erroneous.
They aren't minor. Not having the defconfig have a listed MAINTAINER means I don't know who to contact later on when something needs to be migrated, etc. Not having the documentation be generated cleanly is a problem because we're trying to improve our documentation as that's helpful for end users.
Your v9 patchs have two problems:
Problem 1: I have run your v9 patchs with Travis CI today, but it still FAIL. Please check about the failure items as below: https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678854283
Problem 2: BTW, it also fail to boot smp kernel when I verify with ae350_rv64_defconfig on AE350 board. Please check about the fail booting log:
Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 bootconsole [early0] enabled Initial ramdisk at: 0x (ptrval) (13665712 bytes) Zone ranges: DMA32 [mem 0x0000000000200000-0x000000003fffffff] Normal empty Movable zone start for each node Early memory node ranges node 0: [mem 0x0000000000200000-0x000000003fffffff] Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 compatible privileged spec version 1.10 percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 Built 1 zonelists, mobility grouping on. Total pages: 258055 Kernel command line: console=ttyS0,38400n8 debug loglevel=7 log_buf_len individual max cpu contribution: 4096 bytes log_buf_len total cpu_extra contributions: 12288 bytes log_buf_len min size: 16384 bytes log_buf_len: 32768 bytes early log buf free: 14608(89%) Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) Sorting __ex_table... Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 Preemptible hierarchical RCU implementation. Tasks RCU enabled. NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 riscv,cpu_intc,0: 64 local interrupts mapped riscv,cpu_intc,1: 64 local interrupts mapped riscv,cpu_intc,2: 64 local interrupts mapped riscv,cpu_intc,3: 64 local interrupts mapped PPPooowwweeerrr oooffffff
Thanks, Rick
Thanks!
--Sean
-- Tom