On 1 October 2014 20:43, Stefan Roese sr@denx.de wrote:
This is needed for the SoCFPGA booting from SPI NOR flash e.g. (N25Q256A). With these changes, the SoCrates can boot and re-boot (reset) from SPI NOR flash without any problems.
Signed-off-by: Stefan Roese sr@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@altera.com Cc: Vince Bridgers vbridger@altera.com Cc: Marek Vasut marex@denx.de Cc: Pavel Machek pavel@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Jagannadha Sutradharudu Teki jagannadh.teki@gmail.com
drivers/mtd/spi/sf_probe.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4d148d1..85b2677 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -355,6 +355,37 @@ static struct spi_flash *spi_flash_probe_slave(struct spi_slave *spi) } }
+#ifdef CONFIG_SPI_N25Q256A_RESET +#define CMD_RESET_ENABLE 0x66 +#define CMD_RESET_MEMORY 0x99
/** This is needed for the SoCFPGA booting from SPI NOR flash* e.g. (N25Q256A). Additionally its necessary to change* this line in the Linux SPI NOR flash driver:** { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512,* SECT_4K | SHUTDOWN_3BYTE) },** Add SHUTDOWN_3BYTE here.** With these changes, the SoCrates can boot and re-boot* (reset) from SPI NOR flash without any problems.*/ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0);if (ret) {printf("SF: Failed issue reset command\n");goto err_read_id;}ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0);if (ret) {printf("SF: Failed issue reset command\n");goto err_read_id;}printf("SF: Device software reset\n");+#endif
I have tested N25Q256A on zynq, couldn't encounter this either. This seems to be SPI flash logic more hardwired to N25Q256A.
Any comments?
#ifdef CONFIG_OF_CONTROL if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { debug("SF: FDT decode error\n"); -- 2.1.1
thanks!