rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang hl@rock-chips.com --- Changes in v1: None Changes in v2: None Changes in v3: None Changes in v4: None Changes in v5: None Changes in v6: - Advices by Simon: - use int instead of u32 for fifo_depth - use fdtdec_get_bool() to get "fifo-mode" property
arch/arm/dts/rk3036.dtsi | 1 + drivers/mmc/rockchip_dw_mmc.c | 21 +++++++++++++++++---- 2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi index 0daae1e..ecf5416 100644 --- a/arch/arm/dts/rk3036.dtsi +++ b/arch/arm/dts/rk3036.dtsi @@ -257,6 +257,7 @@ cap-mmc-highspeed; mmc-ddr-1_8v; disable-wp; + fifo-mode; non-removable; num-slots = <1>; default-sample-phase = <158>; diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index 8502dfc..4c523c0 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -65,6 +65,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; u32 minmax[2]; int ret; + int fifo_depth;
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); if (IS_ERR(priv->grf)) @@ -73,10 +74,22 @@ static int rockchip_dwmmc_probe(struct udevice *dev) if (ret) return ret;
- ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, - "clock-freq-min-max", minmax, 2); - if (!ret) - ret = add_dwmci(host, minmax[1], minmax[0]); + if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, + "clock-freq-min-max", minmax, 2)) + return -EINVAL; + + fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "fifo-depth", 0); + if (fifo_depth < 0) + return -EINVAL; + + host->fifoth_val = MSIZE(0x2) | + RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); + + if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode")) + host->fifo_mode = true; + + ret = add_dwmci(host, minmax[1], minmax[0]); if (ret) return ret;