This converts the following to Kconfig:
CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_TRUST_ARCH_v1 CONFIG_FSL_SDHC_V2_3 CONFIG_MAX_DSP_CPUS CONFIG_MIU_2BIT_INTERLEAVED CONFIG_SERIAL_BOOT CONFIG_SPI_BOOTING CONFIG_X86EMU_RAW_IO
Signed-off-by: Tom Rini trini@konsulko.com --- README | 13 ------------- arch/Kconfig.nxp | 17 +++++++++++++++++ arch/arm/include/asm/fsl_secure_boot.h | 15 --------------- arch/arm/mach-exynos/Kconfig | 4 ++++ arch/powerpc/cpu/mpc85xx/Kconfig | 5 +++++ arch/powerpc/include/asm/config_mpc85xx.h | 7 ------- arch/powerpc/include/asm/fsl_secure_boot.h | 18 ------------------ board/freescale/common/fsl_validate.c | 18 +++++++++--------- board/google/Kconfig | 4 ++++ board/samsung/smdkv310/Kconfig | 3 +++ board/sysam/stmark2/Kconfig | 4 ++++ configs/M53017EVB_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + doc/README.fsl-dpaa | 10 ---------- drivers/mmc/Kconfig | 5 +++++ drivers/mtd/Kconfig | 19 +++++++++++++++++++ drivers/net/Kconfig | 13 +++++++++++++ include/configs/M53017EVB.h | 1 - include/configs/conga-qeval20-qa3-e3845.h | 1 - include/configs/dfi-bt700.h | 1 - include/configs/exynos5-dt-common.h | 1 - include/configs/mccmon6.h | 1 - include/configs/minnowmax.h | 1 - include/configs/smdkv310.h | 3 --- include/configs/som-db5800-som-6867.h | 1 - include/configs/stmark2.h | 4 ---- include/configs/theadorable-x86-common.h | 1 - include/configs/x86-chromebook.h | 1 - 29 files changed, 86 insertions(+), 88 deletions(-) delete mode 100644 doc/README.fsl-dpaa
diff --git a/README b/README index 058352074265..b833aca2e582 100644 --- a/README +++ b/README @@ -1477,19 +1477,6 @@ Configuration Settings: - CONFIG_SYS_FLASH_USE_BUFFER_WRITE Use buffered writes to flash.
-- CONFIG_FLASH_SPANSION_S29WS_N - s29ws-n MirrorBit flash has non-standard addresses for buffered - write commands. - -- CONFIG_FLASH_VERIFY - If defined, the content of the flash (destination) is compared - against the source after the write operation. An error message - will be printed when the contents are not identical. - Please note that this option is useless in nearly all cases, - since such flash programming errors usually are detected earlier - while unprotecting/erasing/programming. Please only enable - this option if you really know what you are doing. - - CONFIG_ENV_FLAGS_LIST_DEFAULT - CONFIG_ENV_FLAGS_LIST_STATIC Enable validation of the values given to environment variables when diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 805fe934a1f5..ad61dabb31b3 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -1,5 +1,10 @@ +config FSL_TRUST_ARCH_v1 + bool + config NXP_ESBC bool "NXP ESBC (secure boot) functionality" + select FSL_TRUST_ARCH_v1 if ARCH_P3041 || ARCH_P4080 || \ + ARCH_P5040 || ARCH_P2041 help Enable Freescale Secure Boot feature. Normally selected by defconfig. If unsure, do not change. @@ -10,6 +15,7 @@ menu "Chain of trust / secure boot options" config CHAIN_OF_TRUST select FSL_CAAM select ARCH_MISC_INIT + select FSL_ISBC_KEY_EXT if (ARM || FSL_CORENET) && !SYS_RAMBOOT select FSL_SEC_MON select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) @@ -41,6 +47,17 @@ config ESBC_ADDR_64BIT help For Layerscape based platforms, ESBC image Address in Header is 64bit.
+config FSL_ISBC_KEY_EXT + bool + help + The key used for verification of next level images is picked up from + an Extension Table which has been verified by the ISBC (Internal + Secure boot Code) in boot ROM of the SoC. The feature is only + applicable in case of NOR boot and is not applicable in case of + RAMBOOT (NAND, SD, SPI). For Layerscape, this feature is available + for all device if IE Table is copied to XIP memory Also, for + Layerscape, ISBC doesn't verify this table. + config SYS_FSL_SFP_BE def_bool y depends on PPC || FSL_LSCH2 || ARCH_LS1021A diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index a4f4961fc877..6a9d198cb811 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -9,21 +9,6 @@
#ifdef CONFIG_CHAIN_OF_TRUST #ifndef CONFIG_SPL_BUILD -#ifndef CONFIG_SYS_RAMBOOT -/* The key used for verification of next level images - * is picked up from an Extension Table which has - * been verified by the ISBC (Internal Secure boot Code) - * in boot ROM of the SoC. - * The feature is only applicable in case of NOR boot and is - * not applicable in case of RAMBOOT (NAND, SD, SPI). - * For LS, this feature is available for all device if IE Table - * is copied to XIP memory - * Also, for LS, ISBC doesn't verify this table. - */ -#define CONFIG_FSL_ISBC_KEY_EXT - -#endif - #ifdef CONFIG_FSL_LS_PPA /* Define the key hash here if SRK used for signing PPA image is * different from SRK hash put in SFP used for U-Boot. diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 383af83066ec..8f3aee052c8a 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -4,6 +4,9 @@ config BOARD_COMMON def_bool y depends on !TARGET_SMDKV310 && !TARGET_ARNDALE
+config SPI_BOOTING + bool + config USB_BOOTING bool
@@ -27,6 +30,7 @@ config ARCH_EXYNOS5 select BOARD_EARLY_INIT_F select CPU_V7A select SHA_HW_ACCEL + select SPI_BOOTING if EXYNOS5_DT select USB_BOOTING imply CMD_HASH imply CRC32_VERIFY diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f2361560e9ad..721dafc5ab16 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1324,6 +1324,11 @@ config SYS_ULB_CLK config SYS_ETVPE_CLK int default 1 + +config MAX_DSP_CPUS + int + default 12 if ARCH_B4860 + default 2 if ARCH_B4420 endif
config SYS_L2_SIZE_256KB diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 1b5b4947f1a8..edaf8baaaebe 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -23,7 +23,6 @@ #define CFG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
#elif defined(CONFIG_ARCH_P1010) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#elif defined(CONFIG_ARCH_P1021) @@ -93,11 +92,9 @@ #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
#elif defined(CONFIG_ARCH_BSC9131) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
#elif defined(CONFIG_ARCH_BSC9132) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
#elif defined(CONFIG_ARCH_T4240) @@ -136,7 +133,6 @@ #define CFG_SYS_FM_MURAM_SIZE 0x60000
#ifdef CONFIG_ARCH_B4860 -#define CONFIG_MAX_DSP_CPUS 12 #define CONFIG_NUM_DSP_CPUS 6 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CFG_SYS_NUM_FM1_DTSEC 6 @@ -145,7 +141,6 @@ #define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CFG_SYS_FSL_SRIO_IB_WIN_NUM 5 #else -#define CONFIG_MAX_DSP_CPUS 2 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 } #define CFG_SYS_NUM_FM1_DTSEC 4 #define CFG_SYS_NUM_FM1_10GEC 0 @@ -173,7 +168,6 @@ #define CFG_SYS_NUM_FMAN 1 #define CFG_SYS_NUM_FM1_DTSEC 4 #define CFG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FM1_CLK 0 #define CONFIG_QBMAN_CLK_DIV 1 @@ -204,7 +198,6 @@
#elif defined(CONFIG_ARCH_C29X) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index e8b26802062b..09f37ec3e49a 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -35,24 +35,6 @@ #define CFG_SYS_INIT_L3_ADDR 0xbff00000 #endif #endif - -#if defined(CONFIG_ARCH_P3041) || \ - defined(CONFIG_ARCH_P4080) || \ - defined(CONFIG_ARCH_P5040) || \ - defined(CONFIG_ARCH_P2041) - #define CONFIG_FSL_TRUST_ARCH_v1 -#endif - -#if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) -/* The key used for verification of next level images - * is picked up from an Extension Table which has - * been verified by the ISBC (Internal Secure boot Code) - * in boot ROM of the SoC. - * The feature is only applicable in case of NOR boot and is - * not applicable in case of RAMBOOT (NAND, SD, SPI). - */ -#define CONFIG_FSL_ISBC_KEY_EXT -#endif #endif /* #ifdef CONFIG_NXP_ESBC */
#ifdef CONFIG_CHAIN_OF_TRUST diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 285ed9afcc9a..bfe6357b0d60 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -29,7 +29,7 @@ #define CHECK_KEY_LEN(key_len) (((key_len) == 2 * KEY_SIZE_BYTES / 4) || \ ((key_len) == 2 * KEY_SIZE_BYTES / 2) || \ ((key_len) == 2 * KEY_SIZE_BYTES)) -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) /* Global data structure */ static struct fsl_secboot_glb glb; #endif @@ -63,7 +63,7 @@ self: goto self; }
-#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) static u32 check_ie(struct fsl_secboot_img_priv *img) { if (img->hdr.ie_flag & IE_FLAG_MASK) @@ -188,7 +188,7 @@ static u32 check_srk(struct fsl_secboot_img_priv *img) { #ifdef CONFIG_ESBC_HDR_LS /* In LS, No SRK Flag as SRK is always present if IE not present*/ -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) return !check_ie(img); #endif return 1; @@ -278,7 +278,7 @@ static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) } #endif /* CONFIG_ESBC_HDR_LS */
-#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
static void install_ie_tbl(uintptr_t ie_tbl_addr, struct fsl_secboot_img_priv *img) @@ -434,7 +434,7 @@ void fsl_secboot_handle_error(int error) case ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM: case ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN: #endif -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) /*@fallthrough@*/ case ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED: case ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY: @@ -571,7 +571,7 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) key_hash = 1; } #endif -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!key_hash && check_ie(img)) key_hash = 1; #endif @@ -705,7 +705,7 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) } #endif
-#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!key_found && check_ie(img)) { ret = read_validate_ie_tbl(img); if (ret != 0) @@ -851,7 +851,7 @@ static int secboot_init(struct fsl_secboot_img_priv **img_ptr) return -ENOMEM; memset(img, 0, sizeof(struct fsl_secboot_img_priv));
-#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (glb.ie_addr) img->ie_addr = glb.ie_addr; #endif @@ -952,7 +952,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, else ret = memcmp(srk_hash, img->img_key_hash, SHA256_BYTES);
-#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!hash_cmd && check_ie(img)) ret = 0; #endif diff --git a/board/google/Kconfig b/board/google/Kconfig index c57e518c33fe..0474b4e69384 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -6,6 +6,10 @@ if VENDOR_GOOGLE
config BIOSEMU bool + select X86EMU_RAW_IO + +config X86EMU_RAW_IO + bool
choice prompt "Mainboard model" diff --git a/board/samsung/smdkv310/Kconfig b/board/samsung/smdkv310/Kconfig index a6fd657697eb..cf5ac1707430 100644 --- a/board/samsung/smdkv310/Kconfig +++ b/board/samsung/smdkv310/Kconfig @@ -1,5 +1,8 @@ if TARGET_SMDKV310
+config MIU_2BIT_INTERLEAVED + def_bool y + config SYS_BOARD default "smdkv310"
diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig index 49d02744a9a0..b2595059c682 100644 --- a/board/sysam/stmark2/Kconfig +++ b/board/sysam/stmark2/Kconfig @@ -6,6 +6,10 @@ config CF_SBF config EXTRA_CLOCK def_bool y
+config SERIAL_BOOT + def_bool y + depends on CF_SBF + config SYS_INPUT_CLKSRC hex default 30000000 diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 8158cd4e84e8..b6783ab95baa 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_SPANSION_S29WS_N=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 5f8a28737330..1e6cec012137 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_FLASH_VERIFY=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 651eef5d06fd..20b6e03bdfd2 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -67,6 +67,7 @@ CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_FLASH_VERIFY=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y diff --git a/doc/README.fsl-dpaa b/doc/README.fsl-dpaa deleted file mode 100644 index 3ef5eeb32e11..000000000000 --- a/doc/README.fsl-dpaa +++ /dev/null @@ -1,10 +0,0 @@ -This file documents Freescale DPAA-specific options. - -FMan (Frame Manager) - - CONFIG_FSL_FM_10GEC_REGULAR_NOTATION - on SoCs T4240, T2080, LS1043A, etc, the notation between 10GEC and MAC as below: - 10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2 - on SoCs T1024, etc, the notation between 10GEC and MAC as below: - 10GEC1->MAC1, 10GEC2->MAC2 - so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to identify the new SoCs on - which 10GEC enumeration is consistent with MAC enumeration. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 698c91c57f4f..5a5a31c75ab9 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -825,8 +825,13 @@ config MMC_MTK
endif
+config FSL_SDHC_V2_3 + bool + config FSL_ESDHC bool "Freescale/NXP eSDHC controller support" + select FSL_SDHC_V2_3 if ARCH_P1010 || ARCH_BSC9131 || ARCH_BSC9132 \ + || ARCH_C29X help This selects support for the eSDHC (Enhanced Secure Digital Host Controller) found on numerous Freescale/NXP SoCs. diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 04ae45665e40..af45ef00dae4 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -119,6 +119,13 @@ config SYS_FLASH_EMPTY_INFO bool "Enable displaying empty sectors in flash info" depends on FLASH_CFI_DRIVER
+config FLASH_SPANSION_S29WS_N + bool "Non-standard s29ws-n MirrorBit flash" + depends on FLASH_CFI_DRIVER + help + Enable this if the s29ws-n MirrorBit flash has non-standard addresses + for buffered write commands. + config FLASH_CFI_MTD bool "Enable CFI MTD driver" depends on FLASH_CFI_DRIVER @@ -156,6 +163,18 @@ config SYS_FLASH_CHECKSUM If the variable flashchecksum is set in the environment, perform a CRC of the flash and print the value to console.
+config FLASH_VERIFY + bool "Compare writes to NOR flash with source location" + depends on MTD_NOR_FLASH + help + If enabled, the content of the flash (destination) is compared + against the source after the write operation. An error message will + be printed when the contents are not identical. Please note that + this option is useless in nearly all cases, since such flash + programming errors usually are detected earlier while + unprotecting/erasing/programming. Please only enable this option if + you really know what you are doing. + config ALTERA_QSPI bool "Altera Generic Quad SPI Controller" depends on DM_MTD diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 0607f959da49..53fb69f52607 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -372,6 +372,7 @@ config FMAN_ENET select SYS_FMAN_V3 if ARCH_B4420 || ARCH_B4860 || ARCH_LS1043A || \ ARCH_LS1046A || ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || \ ARCH_T2080 || ARCH_T4240 + select FSL_FM_10GEC_REGULAR_NOTATION if ARCH_T1024 help This driver support the Freescale FMan Ethernet controller
@@ -391,6 +392,18 @@ config SYS_FMAN_V3 help SoC has FMan v3 with mEMAC
+config FSL_FM_10GEC_REGULAR_NOTATION + bool + help + On SoCs T4240, T2080, LS1043A, etc, the notation between 10GEC and + MAC as below: + 10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2 + While on SoCs T1024, etc, the notation between 10GEC and MAC as below: + 10GEC1->MAC1, 10GEC2->MAC2 + so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to identify the + new SoCs on which 10GEC enumeration is consistent with MAC + enumeration. + config FTMAC100 bool "Ftmac100 Ethernet Support" help diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 42b74aeb9b5d..439ed93a2372 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -93,7 +93,6 @@ * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ #endif
diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 823d37fc38ca..e9b85b4e1c72 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -17,7 +17,6 @@ "stderr=serial\0"
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
#undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 52f2d50118a4..154c4f4f13f3 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -21,7 +21,6 @@ "stderr=serial\0"
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
#undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index c9e0c13172cc..8f2dac61cba3 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -17,6 +17,5 @@
#define CFG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) -#define CONFIG_SPI_BOOTING
#endif diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 7c401a2cfd6c..a7f550769261 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -25,7 +25,6 @@
/* NOR 16-bit mode */ #define CFG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_FLASH_VERIFY
/* NOR Flash MTD */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 50c52f8839b1..6c15c72efda5 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -18,6 +18,5 @@ "usb_pgood_delay=40\0"
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
#endif /* __CONFIG_H */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index af0c8200fc23..601c16ea4538 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -34,9 +34,6 @@
/* FLASH and environment organization */
-/* MIU (Memory Interleaving Unit) */ -#define CONFIG_MIU_2BIT_INTERLEAVED - #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index ee038d83bc05..f09709213673 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -17,6 +17,5 @@ "stderr=serial,vidconsole\0"
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
#endif /* __CONFIG_H */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index faff8d6ed6d1..f81cef0a2c4d 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -63,10 +63,6 @@
#define CFG_SYS_DRAM_TEST
-#if defined(CONFIG_CF_SBF) -#define CONFIG_SERIAL_BOOT -#endif - /* Reserve 256 kB for Monitor */
/* diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index af0a095dfc8c..b57b1beaafe4 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -16,7 +16,6 @@ "stderr=serial\0"
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
/* Environment settings */
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index ec87eddd4c72..9df3bfd527f6 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -11,7 +11,6 @@ #define CONFIG_X86_REFCODE_RUN_ADDR 0
#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \