[PATCH] serial: uartlite: Fix uninitialized ret in debug uartlite

From: Ashok Reddy Soma ashok.reddy.soma@xilinx.com

Endianness detection is checked against uninitialized ret variable. Assign ret with read value from status register to fix this.

Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

drivers/serial/serial_xuartlite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 236ab860ad87..1453fb42579b 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -148,7 +148,7 @@ static inline void _debug_uart_init(void)

uart_out32(&regs->control, 0); uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); - uart_in32(&regs->status); + ret = uart_in32(&regs->status); /* Endianness detection */ if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) { little_endian = true;