Kim,
are you using TOT of mpc83xx or master ?
ToT seems to be working fine for me (using different PHYs though):
U-Boot 2010.06-rc2-00035-g1f24126 (Jun 21 2010 - 11:16:54) MPC83XX
[snip]
you can try applying commit 71bd860cce4493c5def07804723661e75271052b "mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init." but I don't think that's the problem, since it doesn't affect the p2020.
This is already present in current master.
Upgrade to ToT? Start a git bisect? on drivers/net/tsec.c?
I'm on ToT of current master. Tried starting a bisect, but couldn't find a working version ... went back until v2009.1 ... very strange.
Checking both PHY's with "mii read" clearly showed both PHYs are up and running and are configured the same way (besides adress of course).
Checking RGMII I/F with the scope shows that Rx from both PHYs is working fine, but TSEC2_TXD[0:3] are dead, i.e. no output at all. TSEC2_GTX_CLK is active (125MHz) as soon as a Tx should happen.
Will double check the settings.
Felix - is there any chance that you can check your Tx lines of the 2nd MAC ?
Regards, André
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