6 Mar
2020
6 Mar
'20
12:10 a.m.
On Thu, Dec 5, 2019 at 5:04 PM Michael Walle michael@walle.cc wrote:
We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver.
If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Please have a look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set "clk-out-frequency = <125000000>" because that value was the hardcoded value until this commit.
Signed-off-by: Michael Walle michael@walle.cc
Acked-by: Joe Hershberger joe.hershberger@ni.com