The input clock for uart is too slow (25MHz) which introduces frequent data error on both receiving and transmitting even if the baudrate is 115200.
Using high-speed can significantly solve this issue.
Reviewed-by: Simon Glass sjg@chromium.org Signed-off-by: Weijie Gao weijie.gao@mediatek.com --- v2 changes: none --- arch/arm/dts/mt7622.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi index 0127474c95..fb6c1b7154 100644 --- a/arch/arm/dts/mt7622.dtsi +++ b/arch/arm/dts/mt7622.dtsi @@ -175,6 +175,7 @@ status = "disabled"; assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; + mediatek,force-highspeed; };
mmc0: mmc@11230000 {