clock setting is handled via clk dtsi file.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 2d26d0dacaf1..35cb6f2ea197 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1018,7 +1018,6 @@ compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9d0000 0x0 0x100>; clock-names = "bus_clk", "ref_clk"; - clocks = <&clk125>, <&clk125>; #stream-id-cells = <1>; iommus = <&smmu 0x860>; power-domains = <&pd_usb0>; @@ -1045,7 +1044,6 @@ compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9e0000 0x0 0x100>; clock-names = "bus_clk", "ref_clk"; - clocks = <&clk125>, <&clk125>; #stream-id-cells = <1>; iommus = <&smmu 0x861>; power-domains = <&pd_usb1>;