2 Jun
2009
2 Jun
'09
11:45 p.m.
On Fri, Apr 3, 2009 at 3:36 PM, Kumar Gala galak@kernel.crashing.orgwrote:
From: Srikanth Srinivasan srikanth.srinivasan@freescale.com
The patch adds support for P2020DS reference platform. DDR3 interface uses hard-coded initialization rather than SPD for now and was tested at 667Mhz. Some PIXIS register definitions and associated code sections need to be fixed. TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all tested under u-boot.
Signed-off-by: Srikanth Srinivasan srikanth.srinivasan@freescale.com Signed-off-by: Travis Wheatley Travis.Wheatley@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
Applied to HEAD, thanks!
Andy