On x86 systems this device is commonly used to provide legacy port access. It is sort-of a replacement for the old ISA bus.
Add a uclass for this, and allow it to have child devices.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/x86/lib/Makefile | 1 + arch/x86/lib/lpc-uclass.c | 28 ++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + 3 files changed, 30 insertions(+) create mode 100644 arch/x86/lib/lpc-uclass.c
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index fe022f6..6c571dd 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_HAVE_FSP) += cmd_hob.o obj-y += gcc.o obj-y += init_helpers.o obj-y += interrupts.o +obj-y += lpc-uclass.o obj-y += cmd_mtrr.o obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c new file mode 100644 index 0000000..6aeb4d4 --- /dev/null +++ b/arch/x86/lib/lpc-uclass.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass sjg@chromium.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <dm/root.h> + +static int lpc_uclass_post_bind(struct udevice *bus) +{ + /* + * Scan the device tree for devices + * + * Before relocation, only bind devices marked for pre-relocation + * use. + */ + return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset, + gd->flags & GD_FLG_RELOC ? false : true); +} + +UCLASS_DRIVER(lpc) = { + .id = UCLASS_LPC, + .name = "lpc", + .post_bind = lpc_uclass_post_bind, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 84a6955..79b51d3 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -39,6 +39,7 @@ enum uclass_id { UCLASS_PCI_GENERIC, /* Generic PCI bus device */ UCLASS_PCH, /* x86 platform controller hub */ UCLASS_ETH, /* Ethernet device */ + UCLASS_LPC, /* x86 'low pin count' interface */
UCLASS_COUNT, UCLASS_INVALID = -1,