SPL on Engicam i.Core M6 boards enabled DM, so it would require some malloc() pool before relocation in order to load U-Boot proper properly.
So, enable SPL malloc() pool of 0x2000 size similarly like what we have used for icore mmc defconfigs.
Signed-off-by: Shyam Saini shyam.saini@amarulasolutions.com --- configs/imx6qdl_icore_nand_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ad4b930a39..630ad30491 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 # CONFIG_CMD_BMODE is not set CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y