On Jan 26, 2011, at 12:22 AM, Kumar Gala wrote:
From: York Sun yorksun@freescale.com
Workaround for the following errata: DDR111 - MCKE signal may not function correctly at assertion of HRESET DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can calibrate to incorrect values
These two workarounds must be implemented together because they touch common registers.
Signed-off-by: York Sun yorksun@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 + arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 107 ++++++++++++++++++++++++++++- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/fsl_ddr_sdram.h | 5 ++ 4 files changed, 116 insertions(+), 1 deletions(-)
applied to 85xx
- k