Hi all,
This series adds an implementation of the psci suspend function for both sun5i and sun7i. This was tested on Nextthing's CHIP and on a A20, using cpuidle in Linux. My tests showed a power consumption reduced by nearly a factor 2 on the CHIP when the system was idle. It went from ~1W without cpuidle enabled to ~0.6W.
As the sun5i does not have a GIC, I needed to remove some code from the generic psci code. To do this I added an ARM_GIC Kconfig option which needs to be selected by each SoC having a GIC. I already added the relevant lines for SoCs using the PSCI ARMv7 code. As this Kconfig option is currently only used in the psci code, it should be safe to add it even if all the SoCs having a GIC do not select it, as long as they don't have psci functions.
On multi-core systems, we need to ensure all CPU are in psci suspend function to switch the cpu clk source. Likewise, the first CPU to exit the psci suspend function should restore the cpu clk source; and only the first one. This series adds a few atomic operation (with return support) in order to solve this problem. Please review them carefully as I'm not sure about the implementation of such functions.
Thanks!
Antoine
Since v2: - Stopped putting the dram into self-refresh. - Removed pll2-7 disabling. - Added an atomic variable to only change the cpuclk source when all CPUs are in idle. - Did a similar implementation to be sure the first CPU to leave the idle mode switches back the cpuclk source to pll1. - Rebased on the latest master and updated the patches.
Since v1: - Rebased on the latest master and updated the patches. - Fixed a compile warning I introduced in virt-v7.c - Added the missing ARM_GIC Kconfig options. - Fixed a commit message (removed 'HYP').
Antoine Tenart (10): arm: add atomic functions with return support ARM: add the ARM_GIC configuration option sunxi: select ARM_GIC for sun[6789]i ARM: select ARM_GIC for SoCs having a psci implementation exynos: select ARM_GIC for TARGET_ARNDALE tegra: select ARM_GIC for Tegra TK1s ARM: PSCI: protect GIC specific code with ARM_GIC sun5/7i: add an implementation of the psci suspend function sun5i: add defines used by the PSCI code sun5i: boot in non-secure mode by default
arch/arm/Kconfig | 11 +++ arch/arm/cpu/armv7/nonsec_virt.S | 6 ++ arch/arm/cpu/armv7/sunxi/Makefile | 9 ++- arch/arm/cpu/armv7/sunxi/psci.c | 2 +- arch/arm/cpu/armv7/sunxi/psci_suspend.c | 108 ++++++++++++++++++++++++++ arch/arm/cpu/armv7/virt-v7.c | 42 ++++++---- arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 6 ++ arch/arm/include/asm/atomic.h | 34 ++++++++ arch/arm/mach-exynos/Kconfig | 1 + arch/arm/mach-tegra/tegra124/Kconfig | 2 + board/sunxi/Kconfig | 10 +++ include/configs/sun5i.h | 3 + 12 files changed, 218 insertions(+), 16 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/psci_suspend.c