On 25/09/2020 21:36, Arnaud Patard (Rtp) wrote:
The current code is setting the clock rate to 192000000, but due to the current device-tree configuration and linux code, it should rather be 100000000.
This looks like it's ACLK_VOP to me. FYI, coreboot sets it to 192 MHz for rk3288 and 200 MHz for rk3399. But from what I can understand the U-Boot rk3399 clock driver just ignores this call and sets it to 198 MHz anyway while setting DCLK_VOP...
Signed-off-by: Arnaud Patard arnaud.patard@rtp-net.org Index: u-boot/drivers/video/rockchip/rk_edp.c =================================================================== --- u-boot.orig/drivers/video/rockchip/rk_edp.c +++ u-boot/drivers/video/rockchip/rk_edp.c @@ -1075,7 +1078,7 @@ static int rk_edp_probe(struct udevice * } ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); if (ret >= 0) {
ret = clk_set_rate(&clk, 192000000);
ret = clk_set_rate(&clk, 100000000);