
23 Jul
2015
23 Jul
'15
1:24 a.m.
On 22 July 2015 at 02:21, Bin Meng bmeng.cn@gmail.com wrote:
Currently during writing MP table I/O interrupt assignment entry, we assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which however is not always the case on some platforms.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Acked-by: Simon Glass sjg@chromium.org
Changes in v3: None Changes in v2:
- Drop patches that are already applied
- Add a TODO comment above mp_determine_pci_dstirq()
arch/x86/include/asm/mpspec.h | 17 +++++++++++++++++ arch/x86/lib/mpspec.c | 24 +++++++++++++++++------- 2 files changed, 34 insertions(+), 7 deletions(-)
Applied to u-boot-x86, thanks!