RE: [PATCH 07/13] imx: imx8mn: add i.MX8MN LPDDR4 EVK support

28 Dec 2020

Hello Peng,
...
-----Original Message-----
From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Peng Fan (OSS)
Sent: Monday, December 28, 2020 1:17 PM
To: sbabic@denx.de; festevam@gmail.com
Cc: uboot-imx@nxp.com; u-boot@lists.denx.de; Peng Fan peng.fan@nxp.com
Subject: [PATCH 07/13] imx: imx8mn: add i.MX8MN LPDDR4 EVK support
From: Peng Fan peng.fan@nxp.com
i.MX8MN LPDDR4 EVK reuses most code of i.MX8MN DDR4 EVK code,
with adding a new ddr script.
Signed-off-by: Peng Fan peng.fan@nxp.com
arch/arm/dts/Makefile                         |    1 +
 arch/arm/dts/imx8mn-evk-u-boot.dtsi           |    6 +
 arch/arm/dts/imx8mn-evk.dts                   |  128 ++
 arch/arm/mach-imx/imx8m/Kconfig               |    6 +
 .../mach-imx/imx8m/imximage-8mn-lpddr4.cfg    |   17 +
 board/freescale/imx8mn_evk/Kconfig            |    2 +-
 board/freescale/imx8mn_evk/Makefile           |    1 +
 board/freescale/imx8mn_evk/lpddr4_timing.c    | 1585 +++++++++++++++++
 configs/imx8mn_evk_defconfig                  |   80 +
 9 files changed, 1825 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx8mn-evk-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx8mn-evk.dts
 create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg
 create mode 100644 board/freescale/imx8mn_evk/lpddr4_timing.c
 create mode 100644 configs/imx8mn_evk_defconfig
Any chance that the documentation for this derivative is added, or a current [doc/board/freescale/imx8mn_evk.rst]
is updated to include the information on how to assemble both DDR and LPDDR derivatives?
...

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fd47e408f8..eb7fef9257 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -775,6 +775,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
        imx8mm-verdin.dtb \
        phycore-imx8mm.dtb \
        imx8mn-ddr4-evk.dtb \

  imx8mn-evk.dtb \
  imx8mq-evk.dtb \
  imx8mm-beacon-kit.dtb \
  imx8mq-phanbell.dtb \



diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-
u-boot.dtsi
new file mode 100644
index 0000000000..617a6603cb
--- /dev/null
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*


Copyright 2020 NXP


*/


+#include "imx8mn-ddr4-evk-u-boot.dtsi"
diff --git a/arch/arm/dts/imx8mn-evk.dts b/arch/arm/dts/imx8mn-evk.dts
new file mode 100644
index 0000000000..b4225cfcb6
--- /dev/null
+++ b/arch/arm/dts/imx8mn-evk.dts
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*


Copyright 2019 NXP


*/


+/dts-v1/;



+#include "imx8mn.dtsi"
+#include "imx8mn-evk.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>



+/ {

  model = "NXP i.MX8MNano EVK board";


  compatible = "fsl,imx8mn-evk", "fsl,imx8mn";



+};



+&A53_0 {

  cpu-supply = <&buck2>;



+};



+&A53_1 {

  cpu-supply = <&buck2>;



+};



+&A53_2 {

  cpu-supply = <&buck2>;



+};



+&A53_3 {

  cpu-supply = <&buck2>;



+};



+&i2c1 {

  pmic: pmic@25 {


          compatible = "nxp,pca9450b";


          reg = <0x25>;


          pinctrl-names = "default";


          pinctrl-0 = <&pinctrl_pmic>;


          interrupt-parent = <&gpio1>;


          interrupts = <3 IRQ_TYPE_LEVEL_LOW>;



          regulators {


                  buck1: BUCK1{


                          regulator-name = "BUCK1";


                          regulator-min-microvolt = <600000>;


                          regulator-max-microvolt = <2187500>;


                          regulator-boot-on;


                          regulator-always-on;


                          regulator-ramp-delay = <3125>;


                  };



                  buck2: BUCK2 {


                          regulator-name = "BUCK2";


                          regulator-min-microvolt = <600000>;


                          regulator-max-microvolt = <2187500>;


                          regulator-boot-on;


                          regulator-always-on;


                          regulator-ramp-delay = <3125>;


                          nxp,dvs-run-voltage = <950000>;


                          nxp,dvs-standby-voltage = <850000>;


                  };



                  buck4: BUCK4{


                          regulator-name = "BUCK4";


                          regulator-min-microvolt = <600000>;


                          regulator-max-microvolt = <3400000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  buck5: BUCK5{


                          regulator-name = "BUCK5";


                          regulator-min-microvolt = <600000>;


                          regulator-max-microvolt = <3400000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  buck6: BUCK6 {


                          regulator-name = "BUCK6";


                          regulator-min-microvolt = <600000>;


                          regulator-max-microvolt = <3400000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  ldo1: LDO1 {


                          regulator-name = "LDO1";


                          regulator-min-microvolt = <1600000>;


                          regulator-max-microvolt = <3300000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  ldo2: LDO2 {


                          regulator-name = "LDO2";


                          regulator-min-microvolt = <800000>;


                          regulator-max-microvolt = <1150000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  ldo3: LDO3 {


                          regulator-name = "LDO3";


                          regulator-min-microvolt = <800000>;


                          regulator-max-microvolt = <3300000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  ldo4: LDO4 {


                          regulator-name = "LDO4";


                          regulator-min-microvolt = <800000>;


                          regulator-max-microvolt = <3300000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };



                  ldo5: LDO5 {


                          regulator-name = "LDO5";


                          regulator-min-microvolt = <1800000>;


                          regulator-max-microvolt = <3300000>;


                          regulator-boot-on;


                          regulator-always-on;


                  };


          };


  };



+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-
imx/imx8m/Kconfig
index bd2ab77b75..1d78723c0b 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -43,6 +43,12 @@ config TARGET_IMX8MM_EVK
        select SUPPORT_SPL
        select IMX8M_LPDDR4
+config TARGET_IMX8MN_EVK

  bool "imx8mn LPDDR4 EVK board"


  select IMX8MN


  select SUPPORT_SPL


  select IMX8M_LPDDR4




config TARGET_IMX8MN_DDR4_EVK
        bool "imx8mn DDR4 EVK board"
        select IMX8MN
diff --git a/arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg
b/arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg
new file mode 100644
index 0000000000..deea2b487a
--- /dev/null
+++ b/arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*


Copyright 2020 NXP


*/


+#define __ASSEMBLY__



+FIT
+ROM_VERSION    v2
+BOOT_FROM      sd
+LOADER         spl/u-boot-spl-ddr.bin  0x912000
+SECOND_LOADER  u-boot.itb              0x40200000 0x60000



+DDR_FW lpddr4_pmu_train_1d_imem.bin
+DDR_FW lpddr4_pmu_train_1d_dmem.bin
+DDR_FW lpddr4_pmu_train_2d_imem.bin
+DDR_FW lpddr4_pmu_train_2d_dmem.bin
diff --git a/board/freescale/imx8mn_evk/Kconfig
b/board/freescale/imx8mn_evk/Kconfig
index 048fb7d97f..ace6fc1e39 100644
--- a/board/freescale/imx8mn_evk/Kconfig
+++ b/board/freescale/imx8mn_evk/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_IMX8MN_DDR4_EVK
+if TARGET_IMX8MN_EVK || TARGET_IMX8MN_DDR4_EVK
config SYS_BOARD
        default "imx8mn_evk"
diff --git a/board/freescale/imx8mn_evk/Makefile
b/board/freescale/imx8mn_evk/Makefile
index 9511a70c31..5d7dbe6628 100644
--- a/board/freescale/imx8mn_evk/Makefile
+++ b/board/freescale/imx8mn_evk/Makefile
@@ -8,5 +8,6 @@ obj-y += imx8mn_evk.o
ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
 obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing.o
 endif
diff --git a/board/freescale/imx8mn_evk/lpddr4_timing.c
b/board/freescale/imx8mn_evk/lpddr4_timing.c
new file mode 100644
index 0000000000..5f6d34f3f3
--- /dev/null
+++ b/board/freescale/imx8mn_evk/lpddr4_timing.c
@@ -0,0 +1,1585 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*


Copyright 2019 NXP







Generated code from MX8M_DDR_tool



Align with uboot-imx_v2020.04 Q4


*/


+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>



+struct dram_cfg_param ddr_ddrc_cfg[] = {

  {0x3d400020, 0x00000213},


  {0x3d400024, 0x0003e800},


  {0x3d400030, 0x00000120},


  {0x3d400000, 0xa3080020},


  {0x3d400064, 0x006100e0},


  {0x3d4000d0, 0xc003061c},


  {0x3d4000d4, 0x009e0000},


  {0x3d4000dc, 0x00d4002d},


  {0x3d4000e0, 0x00310000},


  {0x3d4000e8, 0x0066004d},


  {0x3d4000ec, 0x0016004a},


  {0x3d400100, 0x1a201b22},


  {0x3d400104, 0x00060633},


  {0x3d40010c, 0x00c0c000},


  {0x3d400110, 0x0f04080f},


  {0x3d400114, 0x02040c0c},


  {0x3d400118, 0x01010007},


  {0x3d40011c, 0x00000401},


  {0x3d400130, 0x00020600},


  {0x3d400134, 0x0c100002},


  {0x3d400138, 0x000000e6},


  {0x3d400144, 0x00a00050},


  {0x3d400180, 0x03200018},


  {0x3d400184, 0x028061a8},


  {0x3d400188, 0x00000000},


  {0x3d400190, 0x0497820a},


  {0x3d4001b4, 0x0000170a},


  {0x3d400108, 0x070e1617},


  {0x3d4001c0, 0x00000001},


  {0x3d400194, 0x00080303},


  {0x3d4001a0, 0xe0400018},


  {0x3d4001a4, 0x00df00e4},


  {0x3d4001a8, 0x80000000},


  {0x3d4001b0, 0x00000011},


  {0x3d4001c4, 0x00000001},


  {0x3d4000f4, 0x00000c99},


  {0x3d400200, 0x00000017},


  {0x3d400204, 0x00080808},


  {0x3d400208, 0x00000000},


  {0x3d40020c, 0x00000000},


  {0x3d400210, 0x00001f1f},


  {0x3d400214, 0x07070707},


  {0x3d400218, 0x07070707},


  {0x3d40021c, 0x00000f0f},


  {0x3d400250, 0x29001701},


  {0x3d400254, 0x0000002c},


  {0x3d40025c, 0x04000030},


  {0x3d400264, 0x900093e7},


  {0x3d40026c, 0x20005574},


  {0x3d400400, 0x00000111},


  {0x3d400408, 0x000072ff},


  {0x3d400494, 0x02100e07},


  {0x3d400498, 0x00620096},


  {0x3d40049c, 0x01100e07},


  {0x3d4004a0, 0x00c8012c},


  {0x3d402020, 0x00000011},


  {0x3d402024, 0x00007d00},


  {0x3d402050, 0x0020d040},


  {0x3d402064, 0x000c001d},


  {0x3d4020f4, 0x00000c99},


  {0x3d402100, 0x0a040305},


  {0x3d402104, 0x00030407},


  {0x3d402108, 0x0203060b},


  {0x3d40210c, 0x00505000},


  {0x3d402110, 0x02040202},


  {0x3d402114, 0x02030202},


  {0x3d402118, 0x01010004},


  {0x3d40211c, 0x00000301},


  {0x3d402130, 0x00020300},


  {0x3d402134, 0x0a100002},


  {0x3d402138, 0x0000001d},


  {0x3d402144, 0x0014000a},


  {0x3d402180, 0x00650004},


  {0x3d402190, 0x03818200},


  {0x3d402194, 0x00080303},


  {0x3d4021b4, 0x00000100},


  {0x3d4020dc, 0x00840000},


  {0x3d4020e0, 0x00310000},


  {0x3d4020e8, 0x0066004d},


  {0x3d4020ec, 0x0016004a},


  {0x3d403020, 0x00000011},


  {0x3d403024, 0x00001f40},


  {0x3d403050, 0x0020d040},


  {0x3d403064, 0x00030007},


  {0x3d4030f4, 0x00000c99},


  {0x3d403100, 0x0a010102},


  {0x3d403104, 0x00030404},


  {0x3d403108, 0x0203060b},


  {0x3d40310c, 0x00505000},


  {0x3d403110, 0x02040202},


  {0x3d403114, 0x02030202},


  {0x3d403118, 0x01010004},


  {0x3d40311c, 0x00000301},


  {0x3d403130, 0x00020300},


  {0x3d403134, 0x0a100002},


  {0x3d403138, 0x00000008},


  {0x3d403144, 0x00050003},


  {0x3d403180, 0x00190004},


  {0x3d403190, 0x03818200},


  {0x3d403194, 0x00080303},


  {0x3d4031b4, 0x00000100},


  {0x3d4030dc, 0x00840000},


  {0x3d4030e0, 0x00310000},


  {0x3d4030e8, 0x0066004d},


  {0x3d4030ec, 0x0016004a},



  /* default boot point */


  { 0x3d400028, 0x0 },



+};



+/* PHY Initialize Configuration */
+struct dram_cfg_param ddr_ddrphy_cfg[] = {

  {0x000100a0, 0x00000000},


  {0x000100a1, 0x00000001},


  {0x000100a2, 0x00000002},


  {0x000100a3, 0x00000003},


  {0x000100a4, 0x00000004},


  {0x000100a5, 0x00000005},


  {0x000100a6, 0x00000006},


  {0x000100a7, 0x00000007},


  {0x000110a0, 0x00000000},


  {0x000110a1, 0x00000001},


  {0x000110a2, 0x00000003},


  {0x000110a3, 0x00000004},


  {0x000110a4, 0x00000005},


  {0x000110a5, 0x00000002},


  {0x000110a6, 0x00000007},


  {0x000110a7, 0x00000006},


  {0x0001005f, 0x0000015f},


  {0x0001015f, 0x0000015f},


  {0x0001105f, 0x0000015f},


  {0x0001115f, 0x0000015f},


  {0x0011005f, 0x0000015f},


  {0x0011015f, 0x0000015f},


  {0x0011105f, 0x0000015f},


  {0x0011115f, 0x0000015f},


  {0x0021005f, 0x0000015f},


  {0x0021015f, 0x0000015f},


  {0x0021105f, 0x0000015f},


  {0x0021115f, 0x0000015f},


  {0x00000055, 0x0000016f},


  {0x00001055, 0x0000016f},


  {0x00002055, 0x0000016f},


  {0x00003055, 0x0000016f},


  {0x00004055, 0x0000016f},


  {0x00005055, 0x0000016f},


  {0x00006055, 0x0000016f},


  {0x00007055, 0x0000016f},


  {0x00008055, 0x0000016f},


  {0x00009055, 0x0000016f},


  {0x000200c5, 0x00000019},


  {0x001200c5, 0x00000007},


  {0x002200c5, 0x00000007},


  {0x0002002e, 0x00000002},


  {0x0012002e, 0x00000002},


  {0x0022002e, 0x00000002},


  {0x00090204, 0x00000000},


  {0x00190204, 0x00000000},


  {0x00290204, 0x00000000},


  {0x00020024, 0x000001a3},


  {0x0002003a, 0x00000002},


  {0x0002007d, 0x00000212},


  {0x0002007c, 0x00000061},


  {0x00120024, 0x000001a3},


  {0x0002003a, 0x00000002},


  {0x0012007d, 0x00000212},


  {0x0012007c, 0x00000061},


  {0x00220024, 0x000001a3},


  {0x0002003a, 0x00000002},


  {0x0022007d, 0x00000212},


  {0x0022007c, 0x00000061},


  {0x00020056, 0x00000003},


  {0x00120056, 0x00000003},


  {0x00220056, 0x00000003},


  {0x0001004d, 0x00000f80},


  {0x0001014d, 0x00000f80},


  {0x0001104d, 0x00000f80},


  {0x0001114d, 0x00000f80},


  {0x0011004d, 0x00000f80},


  {0x0011014d, 0x00000f80},


  {0x0011104d, 0x00000f80},


  {0x0011114d, 0x00000f80},


  {0x0021004d, 0x00000f80},


  {0x0021014d, 0x00000f80},


  {0x0021104d, 0x00000f80},


  {0x0021114d, 0x00000f80},


  {0x00010049, 0x00000fbe},


  {0x00010149, 0x00000fbe},


  {0x00011049, 0x00000fbe},


  {0x00011149, 0x00000fbe},


  {0x00110049, 0x00000fbe},


  {0x00110149, 0x00000fbe},


  {0x00111049, 0x00000fbe},


  {0x00111149, 0x00000fbe},


  {0x00210049, 0x00000fbe},


  {0x00210149, 0x00000fbe},


  {0x00211049, 0x00000fbe},


  {0x00211149, 0x00000fbe},


  {0x00000043, 0x00000063},


  {0x00001043, 0x00000063},


  {0x00002043, 0x00000063},


  {0x00003043, 0x00000063},


  {0x00004043, 0x00000063},


  {0x00005043, 0x00000063},


  {0x00006043, 0x00000063},


  {0x00007043, 0x00000063},


  {0x00008043, 0x00000063},


  {0x00009043, 0x00000063},


  {0x00020018, 0x00000001},


  {0x00020075, 0x00000004},


  {0x00020050, 0x00000000},


  {0x00020008, 0x00000320},


  {0x00120008, 0x00000064},


  {0x00220008, 0x00000019},


  {0x00020088, 0x00000009},


  {0x000200b2, 0x000000dc},


  {0x00010043, 0x000005a1},


  {0x00010143, 0x000005a1},


  {0x00011043, 0x000005a1},


  {0x00011143, 0x000005a1},


  {0x001200b2, 0x000000dc},


  {0x00110043, 0x000005a1},


  {0x00110143, 0x000005a1},


  {0x00111043, 0x000005a1},


  {0x00111143, 0x000005a1},


  {0x002200b2, 0x000000dc},


  {0x00210043, 0x000005a1},


  {0x00210143, 0x000005a1},


  {0x00211043, 0x000005a1},


  {0x00211143, 0x000005a1},


  {0x000200fa, 0x00000001},


  {0x001200fa, 0x00000001},


  {0x002200fa, 0x00000001},


  {0x00020019, 0x00000001},


  {0x00120019, 0x00000001},


  {0x00220019, 0x00000001},


  {0x000200f0, 0x00000660},


  {0x000200f1, 0x00000000},


  {0x000200f2, 0x00004444},


  {0x000200f3, 0x00008888},


  {0x000200f4, 0x00005665},


  {0x000200f5, 0x00000000},


  {0x000200f6, 0x00000000},


  {0x000200f7, 0x0000f000},


  {0x0001004a, 0x00000500},


  {0x0001104a, 0x00000500},


  {0x00020025, 0x00000000},


  {0x0002002d, 0x00000000},


  {0x0012002d, 0x00000000},


  {0x0022002d, 0x00000000},


  {0x0002002c, 0x00000000},


  {0x000200c7, 0x00000021},


  {0x000200ca, 0x00000024},


  {0x000200cc, 0x000001f7},


  {0x001200c7, 0x00000021},


  {0x001200ca, 0x00000024},


  {0x001200cc, 0x000001f7},


  {0x002200c7, 0x00000021},


  {0x002200ca, 0x00000024},


  {0x002200cc, 0x000001f7},



+};



+/* ddr phy trained csr */
+struct dram_cfg_param ddr_ddrphy_trained_csr[] = {

  {0x0200b2, 0x0},


  {0x1200b2, 0x0},


  {0x2200b2, 0x0},


  {0x0200cb, 0x0},


  {0x010043, 0x0},


  {0x110043, 0x0},


  {0x210043, 0x0},


  {0x010143, 0x0},


  {0x110143, 0x0},


  {0x210143, 0x0},


  {0x011043, 0x0},


  {0x111043, 0x0},


  {0x211043, 0x0},


  {0x011143, 0x0},


  {0x111143, 0x0},


  {0x211143, 0x0},


  {0x000080, 0x0},


  {0x100080, 0x0},


  {0x200080, 0x0},


  {0x001080, 0x0},


  {0x101080, 0x0},


  {0x201080, 0x0},


  {0x002080, 0x0},


  {0x102080, 0x0},


  {0x202080, 0x0},


  {0x003080, 0x0},


  {0x103080, 0x0},


  {0x203080, 0x0},


  {0x004080, 0x0},


  {0x104080, 0x0},


  {0x204080, 0x0},


  {0x005080, 0x0},


  {0x105080, 0x0},


  {0x205080, 0x0},


  {0x006080, 0x0},


  {0x106080, 0x0},


  {0x206080, 0x0},


  {0x007080, 0x0},


  {0x107080, 0x0},


  {0x207080, 0x0},


  {0x008080, 0x0},


  {0x108080, 0x0},


  {0x208080, 0x0},


  {0x009080, 0x0},


  {0x109080, 0x0},


  {0x209080, 0x0},


  {0x010080, 0x0},


  {0x110080, 0x0},


  {0x210080, 0x0},


  {0x010180, 0x0},


  {0x110180, 0x0},


  {0x210180, 0x0},


  {0x011080, 0x0},


  {0x111080, 0x0},


  {0x211080, 0x0},


  {0x011180, 0x0},


  {0x111180, 0x0},


  {0x211180, 0x0},


  {0x010081, 0x0},


  {0x110081, 0x0},


  {0x210081, 0x0},


  {0x010181, 0x0},


  {0x110181, 0x0},


  {0x210181, 0x0},


  {0x011081, 0x0},


  {0x111081, 0x0},


  {0x211081, 0x0},


  {0x011181, 0x0},


  {0x111181, 0x0},


  {0x211181, 0x0},


  {0x0100d0, 0x0},


  {0x1100d0, 0x0},


  {0x2100d0, 0x0},


  {0x0101d0, 0x0},


  {0x1101d0, 0x0},


  {0x2101d0, 0x0},


  {0x0110d0, 0x0},


  {0x1110d0, 0x0},


  {0x2110d0, 0x0},


  {0x0111d0, 0x0},


  {0x1111d0, 0x0},


  {0x2111d0, 0x0},


  {0x0100d1, 0x0},


  {0x1100d1, 0x0},


  {0x2100d1, 0x0},


  {0x0101d1, 0x0},


  {0x1101d1, 0x0},


  {0x2101d1, 0x0},


  {0x0110d1, 0x0},


  {0x1110d1, 0x0},


  {0x2110d1, 0x0},


  {0x0111d1, 0x0},


  {0x1111d1, 0x0},


  {0x2111d1, 0x0},


  {0x010068, 0x0},


  {0x010168, 0x0},


  {0x010268, 0x0},


  {0x010368, 0x0},


  {0x010468, 0x0},


  {0x010568, 0x0},


  {0x010668, 0x0},


  {0x010768, 0x0},


  {0x010868, 0x0},


  {0x011068, 0x0},


  {0x011168, 0x0},


  {0x011268, 0x0},


  {0x011368, 0x0},


  {0x011468, 0x0},


  {0x011568, 0x0},


  {0x011668, 0x0},


  {0x011768, 0x0},


  {0x011868, 0x0},


  {0x010069, 0x0},


  {0x010169, 0x0},


  {0x010269, 0x0},


  {0x010369, 0x0},


  {0x010469, 0x0},


  {0x010569, 0x0},


  {0x010669, 0x0},


  {0x010769, 0x0},


  {0x010869, 0x0},


  {0x011069, 0x0},


  {0x011169, 0x0},


  {0x011269, 0x0},


  {0x011369, 0x0},


  {0x011469, 0x0},


  {0x011569, 0x0},


  {0x011669, 0x0},


  {0x011769, 0x0},


  {0x011869, 0x0},


  {0x01008c, 0x0},


  {0x11008c, 0x0},


  {0x21008c, 0x0},


  {0x01018c, 0x0},


  {0x11018c, 0x0},


  {0x21018c, 0x0},


  {0x01108c, 0x0},


  {0x11108c, 0x0},


  {0x21108c, 0x0},


  {0x01118c, 0x0},


  {0x11118c, 0x0},


  {0x21118c, 0x0},


  {0x01008d, 0x0},


  {0x11008d, 0x0},


  {0x21008d, 0x0},


  {0x01018d, 0x0},


  {0x11018d, 0x0},


  {0x21018d, 0x0},


  {0x01108d, 0x0},


  {0x11108d, 0x0},


  {0x21108d, 0x0},


  {0x01118d, 0x0},


  {0x11118d, 0x0},


  {0x21118d, 0x0},


  {0x0100c0, 0x0},


  {0x1100c0, 0x0},


  {0x2100c0, 0x0},


  {0x0101c0, 0x0},


  {0x1101c0, 0x0},


  {0x2101c0, 0x0},


  {0x0102c0, 0x0},


  {0x1102c0, 0x0},


  {0x2102c0, 0x0},


  {0x0103c0, 0x0},


  {0x1103c0, 0x0},


  {0x2103c0, 0x0},


  {0x0104c0, 0x0},


  {0x1104c0, 0x0},


  {0x2104c0, 0x0},


  {0x0105c0, 0x0},


  {0x1105c0, 0x0},


  {0x2105c0, 0x0},


  {0x0106c0, 0x0},


  {0x1106c0, 0x0},


  {0x2106c0, 0x0},


  {0x0107c0, 0x0},


  {0x1107c0, 0x0},


  {0x2107c0, 0x0},


  {0x0108c0, 0x0},


  {0x1108c0, 0x0},


  {0x2108c0, 0x0},


  {0x0110c0, 0x0},


  {0x1110c0, 0x0},


  {0x2110c0, 0x0},


  {0x0111c0, 0x0},


  {0x1111c0, 0x0},


  {0x2111c0, 0x0},


  {0x0112c0, 0x0},


  {0x1112c0, 0x0},


  {0x2112c0, 0x0},


  {0x0113c0, 0x0},


  {0x1113c0, 0x0},


  {0x2113c0, 0x0},


  {0x0114c0, 0x0},


  {0x1114c0, 0x0},


  {0x2114c0, 0x0},


  {0x0115c0, 0x0},


  {0x1115c0, 0x0},


  {0x2115c0, 0x0},


  {0x0116c0, 0x0},


  {0x1116c0, 0x0},


  {0x2116c0, 0x0},


  {0x0117c0, 0x0},


  {0x1117c0, 0x0},


  {0x2117c0, 0x0},


  {0x0118c0, 0x0},


  {0x1118c0, 0x0},


  {0x2118c0, 0x0},


  {0x0100c1, 0x0},


  {0x1100c1, 0x0},


  {0x2100c1, 0x0},


  {0x0101c1, 0x0},


  {0x1101c1, 0x0},


  {0x2101c1, 0x0},


  {0x0102c1, 0x0},


  {0x1102c1, 0x0},


  {0x2102c1, 0x0},


  {0x0103c1, 0x0},


  {0x1103c1, 0x0},


  {0x2103c1, 0x0},


  {0x0104c1, 0x0},


  {0x1104c1, 0x0},


  {0x2104c1, 0x0},


  {0x0105c1, 0x0},


  {0x1105c1, 0x0},


  {0x2105c1, 0x0},


  {0x0106c1, 0x0},


  {0x1106c1, 0x0},


  {0x2106c1, 0x0},


  {0x0107c1, 0x0},


  {0x1107c1, 0x0},


  {0x2107c1, 0x0},


  {0x0108c1, 0x0},


  {0x1108c1, 0x0},


  {0x2108c1, 0x0},


  {0x0110c1, 0x0},


  {0x1110c1, 0x0},


  {0x2110c1, 0x0},


  {0x0111c1, 0x0},


  {0x1111c1, 0x0},


  {0x2111c1, 0x0},


  {0x0112c1, 0x0},


  {0x1112c1, 0x0},


  {0x2112c1, 0x0},


  {0x0113c1, 0x0},


  {0x1113c1, 0x0},


  {0x2113c1, 0x0},


  {0x0114c1, 0x0},


  {0x1114c1, 0x0},


  {0x2114c1, 0x0},


  {0x0115c1, 0x0},


  {0x1115c1, 0x0},


  {0x2115c1, 0x0},


  {0x0116c1, 0x0},


  {0x1116c1, 0x0},


  {0x2116c1, 0x0},


  {0x0117c1, 0x0},


  {0x1117c1, 0x0},


  {0x2117c1, 0x0},


  {0x0118c1, 0x0},


  {0x1118c1, 0x0},


  {0x2118c1, 0x0},


  {0x010020, 0x0},


  {0x110020, 0x0},


  {0x210020, 0x0},


  {0x011020, 0x0},


  {0x111020, 0x0},


  {0x211020, 0x0},


  {0x020072, 0x0},


  {0x020073, 0x0},


  {0x020074, 0x0},


  {0x0100aa, 0x0},


  {0x0110aa, 0x0},


  {0x020010, 0x0},


  {0x120010, 0x0},


  {0x220010, 0x0},


  {0x020011, 0x0},


  {0x120011, 0x0},


  {0x220011, 0x0},


  {0x0100ae, 0x0},


  {0x1100ae, 0x0},


  {0x2100ae, 0x0},


  {0x0100af, 0x0},


  {0x1100af, 0x0},


  {0x2100af, 0x0},


  {0x0110ae, 0x0},


  {0x1110ae, 0x0},


  {0x2110ae, 0x0},


  {0x0110af, 0x0},


  {0x1110af, 0x0},


  {0x2110af, 0x0},


  {0x020020, 0x0},


  {0x120020, 0x0},


  {0x220020, 0x0},


  {0x0100a0, 0x0},


  {0x0100a1, 0x0},


  {0x0100a2, 0x0},


  {0x0100a3, 0x0},


  {0x0100a4, 0x0},


  {0x0100a5, 0x0},


  {0x0100a6, 0x0},


  {0x0100a7, 0x0},


  {0x0110a0, 0x0},


  {0x0110a1, 0x0},


  {0x0110a2, 0x0},


  {0x0110a3, 0x0},


  {0x0110a4, 0x0},


  {0x0110a5, 0x0},


  {0x0110a6, 0x0},


  {0x0110a7, 0x0},


  {0x02007c, 0x0},


  {0x12007c, 0x0},


  {0x22007c, 0x0},


  {0x02007d, 0x0},


  {0x12007d, 0x0},


  {0x22007d, 0x0},


  {0x0400fd, 0x0},


  {0x0400c0, 0x0},


  {0x090201, 0x0},


  {0x190201, 0x0},


  {0x290201, 0x0},


  {0x090202, 0x0},


  {0x190202, 0x0},


  {0x290202, 0x0},


  {0x090203, 0x0},


  {0x190203, 0x0},


  {0x290203, 0x0},


  {0x090204, 0x0},


  {0x190204, 0x0},


  {0x290204, 0x0},


  {0x090205, 0x0},


  {0x190205, 0x0},


  {0x290205, 0x0},


  {0x090206, 0x0},


  {0x190206, 0x0},


  {0x290206, 0x0},


  {0x090207, 0x0},


  {0x190207, 0x0},


  {0x290207, 0x0},


  {0x090208, 0x0},


  {0x190208, 0x0},


  {0x290208, 0x0},


  {0x010062, 0x0},


  {0x010162, 0x0},


  {0x010262, 0x0},


  {0x010362, 0x0},


  {0x010462, 0x0},


  {0x010562, 0x0},


  {0x010662, 0x0},


  {0x010762, 0x0},


  {0x010862, 0x0},


  {0x011062, 0x0},


  {0x011162, 0x0},


  {0x011262, 0x0},


  {0x011362, 0x0},


  {0x011462, 0x0},


  {0x011562, 0x0},


  {0x011662, 0x0},


  {0x011762, 0x0},


  {0x011862, 0x0},


  {0x020077, 0x0},


  {0x010001, 0x0},


  {0x011001, 0x0},


  {0x010040, 0x0},


  {0x010140, 0x0},


  {0x010240, 0x0},


  {0x010340, 0x0},


  {0x010440, 0x0},


  {0x010540, 0x0},


  {0x010640, 0x0},


  {0x010740, 0x0},


  {0x010840, 0x0},


  {0x010030, 0x0},


  {0x010130, 0x0},


  {0x010230, 0x0},


  {0x010330, 0x0},


  {0x010430, 0x0},


  {0x010530, 0x0},


  {0x010630, 0x0},


  {0x010730, 0x0},


  {0x010830, 0x0},


  {0x011040, 0x0},


  {0x011140, 0x0},


  {0x011240, 0x0},


  {0x011340, 0x0},


  {0x011440, 0x0},


  {0x011540, 0x0},


  {0x011640, 0x0},


  {0x011740, 0x0},


  {0x011840, 0x0},


  {0x011030, 0x0},


  {0x011130, 0x0},


  {0x011230, 0x0},


  {0x011330, 0x0},


  {0x011430, 0x0},


  {0x011530, 0x0},


  {0x011630, 0x0},


  {0x011730, 0x0},


  {0x011830, 0x0},



+};



+/* P0 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp0_cfg[] = {

  {0x000d0000, 0x00000000},


  {0x00054000, 0x00000000},


  {0x00054001, 0x00000000},


  {0x00054002, 0x00000000},


  {0x00054003, 0x00000c80},


  {0x00054004, 0x00000002},


  {0x00054005, 0x00000000},


  {0x00054006, 0x00000011},


  {0x00054007, 0x00000000},


  {0x00054008, 0x0000131f},


  {0x00054009, 0x000000c8},


  {0x0005400a, 0x00000000},


  {0x0005400b, 0x00000002},


  {0x0005400c, 0x00000000},


  {0x0005400d, 0x00000000},


  {0x0005400e, 0x00000000},


  {0x0005400f, 0x00000100},


  {0x00054010, 0x00000000},


  {0x00054011, 0x00000000},


  {0x00054012, 0x00000310},


  {0x00054013, 0x00000000},


  {0x00054014, 0x00000000},


  {0x00054015, 0x00000000},


  {0x00054016, 0x00000000},


  {0x00054017, 0x00000000},


  {0x00054018, 0x00000000},


  {0x00054019, 0x00002dd4},


  {0x0005401a, 0x00000031},


  {0x0005401b, 0x00004d66},


  {0x0005401c, 0x00004a00},


  {0x0005401d, 0x00000000},


  {0x0005401e, 0x00000016},


  {0x0005401f, 0x00002dd4},


  {0x00054020, 0x00000031},


  {0x00054021, 0x00004d66},


  {0x00054022, 0x00004a00},


  {0x00054023, 0x00000000},


  {0x00054024, 0x0000002e},


  {0x00054025, 0x00000000},


  {0x00054026, 0x00000000},


  {0x00054027, 0x00000000},


  {0x00054028, 0x00000000},


  {0x00054029, 0x00000000},


  {0x0005402a, 0x00000000},


  {0x0005402b, 0x00000000},


  {0x0005402c, 0x00000000},


  {0x0005402d, 0x00000000},


  {0x0005402e, 0x00000000},


  {0x0005402f, 0x00000000},


  {0x00054030, 0x00000000},


  {0x00054031, 0x00000000},


  {0x00054032, 0x0000d400},


  {0x00054033, 0x0000312d},


  {0x00054034, 0x00006600},


  {0x00054035, 0x0000004d},


  {0x00054036, 0x0000004a},


  {0x00054037, 0x00001600},


  {0x00054038, 0x0000d400},


  {0x00054039, 0x0000312d},


  {0x0005403a, 0x00006600},


  {0x0005403b, 0x0000004d},


  {0x0005403c, 0x0000004a},


  {0x0005403d, 0x00002e00},


  {0x0005403e, 0x00000000},


  {0x0005403f, 0x00000000},


  {0x00054040, 0x00000000},


  {0x00054041, 0x00000000},


  {0x00054042, 0x00000000},


  {0x00054043, 0x00000000},


  {0x00054044, 0x00000000},


  {0x000d0000, 0x00000001},



+};



+/* P1 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp1_cfg[] = {

  {0x000d0000, 0x00000000},


  {0x00054000, 0x00000000},


  {0x00054001, 0x00000000},


  {0x00054002, 0x00000101},


  {0x00054003, 0x00000190},


  {0x00054004, 0x00000002},


  {0x00054005, 0x00000000},


  {0x00054006, 0x00000011},


  {0x00054007, 0x00000000},


  {0x00054008, 0x0000121f},


  {0x00054009, 0x000000c8},


  {0x0005400a, 0x00000000},


  {0x0005400b, 0x00000002},


  {0x0005400c, 0x00000000},


  {0x0005400d, 0x00000000},


  {0x0005400e, 0x00000000},


  {0x0005400f, 0x00000100},


  {0x00054010, 0x00000000},


  {0x00054011, 0x00000000},


  {0x00054012, 0x00000310},


  {0x00054013, 0x00000000},


  {0x00054014, 0x00000000},


  {0x00054015, 0x00000000},


  {0x00054016, 0x00000000},


  {0x00054017, 0x00000000},


  {0x00054018, 0x00000000},


  {0x00054019, 0x00000084},


  {0x0005401a, 0x00000031},


  {0x0005401b, 0x00004d66},


  {0x0005401c, 0x00004a00},


  {0x0005401d, 0x00000000},


  {0x0005401e, 0x00000016},


  {0x0005401f, 0x00000084},


  {0x00054020, 0x00000031},


  {0x00054021, 0x00004d66},


  {0x00054022, 0x00004a00},


  {0x00054023, 0x00000000},


  {0x00054024, 0x0000002e},


  {0x00054025, 0x00000000},


  {0x00054026, 0x00000000},


  {0x00054027, 0x00000000},


  {0x00054028, 0x00000000},


  {0x00054029, 0x00000000},


  {0x0005402a, 0x00000000},


  {0x0005402b, 0x00000000},


  {0x0005402c, 0x00000000},


  {0x0005402d, 0x00000000},


  {0x0005402e, 0x00000000},


  {0x0005402f, 0x00000000},


  {0x00054030, 0x00000000},


  {0x00054031, 0x00000000},


  {0x00054032, 0x00008400},


  {0x00054033, 0x00003100},


  {0x00054034, 0x00006600},


  {0x00054035, 0x0000004d},


  {0x00054036, 0x0000004a},


  {0x00054037, 0x00001600},


  {0x00054038, 0x00008400},


  {0x00054039, 0x00003100},


  {0x0005403a, 0x00006600},


  {0x0005403b, 0x0000004d},


  {0x0005403c, 0x0000004a},


  {0x0005403d, 0x00002e00},


  {0x0005403e, 0x00000000},


  {0x0005403f, 0x00000000},


  {0x00054040, 0x00000000},


  {0x00054041, 0x00000000},


  {0x00054042, 0x00000000},


  {0x00054043, 0x00000000},


  {0x00054044, 0x00000000},


  {0x000d0000, 0x00000001},



+};




+/* P2 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp2_cfg[] = {

  {0x000d0000, 0x00000000},


  {0x00054000, 0x00000000},


  {0x00054001, 0x00000000},


  {0x00054002, 0x00000102},


  {0x00054003, 0x00000064},


  {0x00054004, 0x00000002},


  {0x00054005, 0x00000000},


  {0x00054006, 0x00000011},


  {0x00054007, 0x00000000},


  {0x00054008, 0x0000121f},


  {0x00054009, 0x000000c8},


  {0x0005400a, 0x00000000},


  {0x0005400b, 0x00000002},


  {0x0005400c, 0x00000000},


  {0x0005400d, 0x00000000},


  {0x0005400e, 0x00000000},


  {0x0005400f, 0x00000100},


  {0x00054010, 0x00000000},


  {0x00054011, 0x00000000},


  {0x00054012, 0x00000310},


  {0x00054013, 0x00000000},


  {0x00054014, 0x00000000},


  {0x00054015, 0x00000000},


  {0x00054016, 0x00000000},


  {0x00054017, 0x00000000},


  {0x00054018, 0x00000000},


  {0x00054019, 0x00000084},


  {0x0005401a, 0x00000031},


  {0x0005401b, 0x00004d66},


  {0x0005401c, 0x00004a00},


  {0x0005401d, 0x00000000},


  {0x0005401e, 0x00000016},


  {0x0005401f, 0x00000084},


  {0x00054020, 0x00000031},


  {0x00054021, 0x00004d66},


  {0x00054022, 0x00004a00},


  {0x00054023, 0x00000000},


  {0x00054024, 0x0000002e},


  {0x00054025, 0x00000000},


  {0x00054026, 0x00000000},


  {0x00054027, 0x00000000},


  {0x00054028, 0x00000000},


  {0x00054029, 0x00000000},


  {0x0005402a, 0x00000000},


  {0x0005402b, 0x00000000},


  {0x0005402c, 0x00000000},


  {0x0005402d, 0x00000000},


  {0x0005402e, 0x00000000},


  {0x0005402f, 0x00000000},


  {0x00054030, 0x00000000},


  {0x00054031, 0x00000000},


  {0x00054032, 0x00008400},


  {0x00054033, 0x00003100},


  {0x00054034, 0x00006600},


  {0x00054035, 0x0000004d},


  {0x00054036, 0x0000004a},


  {0x00054037, 0x00001600},


  {0x00054038, 0x00008400},


  {0x00054039, 0x00003100},


  {0x0005403a, 0x00006600},


  {0x0005403b, 0x0000004d},


  {0x0005403c, 0x0000004a},


  {0x0005403d, 0x00002e00},


  {0x0005403e, 0x00000000},


  {0x0005403f, 0x00000000},


  {0x00054040, 0x00000000},


  {0x00054041, 0x00000000},


  {0x00054042, 0x00000000},


  {0x00054043, 0x00000000},


  {0x00054044, 0x00000000},


  {0x000d0000, 0x00000001},



+};



+/* P0 2D message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp0_2d_cfg[] = {

  {0x000d0000, 0x00000000},


  {0x00054000, 0x00000000},


  {0x00054001, 0x00000000},


  {0x00054002, 0x00000000},


  {0x00054003, 0x00000c80},


  {0x00054004, 0x00000002},


  {0x00054005, 0x00000000},


  {0x00054006, 0x00000011},


  {0x00054007, 0x00000000},


  {0x00054008, 0x00000061},


  {0x00054009, 0x000000c8},


  {0x0005400a, 0x00000000},


  {0x0005400b, 0x00000002},


  {0x0005400c, 0x00000000},


  {0x0005400d, 0x00000000},


  {0x0005400e, 0x00000000},


  {0x0005400f, 0x00000100},


  {0x00054010, 0x00001f7f},


  {0x00054011, 0x00000000},


  {0x00054012, 0x00000310},


  {0x00054013, 0x00000000},


  {0x00054014, 0x00000000},


  {0x00054015, 0x00000000},


  {0x00054016, 0x00000000},


  {0x00054017, 0x00000000},


  {0x00054018, 0x00000000},


  {0x00054019, 0x00002dd4},


  {0x0005401a, 0x00000031},


  {0x0005401b, 0x00004d66},


  {0x0005401c, 0x00004a00},


  {0x0005401d, 0x00000000},


  {0x0005401e, 0x00000016},


  {0x0005401f, 0x00002dd4},


  {0x00054020, 0x00000031},


  {0x00054021, 0x00004d66},


  {0x00054022, 0x00004a00},


  {0x00054023, 0x00000000},


  {0x00054024, 0x0000002e},


  {0x00054025, 0x00000000},


  {0x00054026, 0x00000000},


  {0x00054027, 0x00000000},


  {0x00054028, 0x00000000},


  {0x00054029, 0x00000000},


  {0x0005402a, 0x00000000},


  {0x0005402b, 0x00000000},


  {0x0005402c, 0x00000000},


  {0x0005402d, 0x00000000},


  {0x0005402e, 0x00000000},


  {0x0005402f, 0x00000000},


  {0x00054030, 0x00000000},


  {0x00054031, 0x00000000},


  {0x00054032, 0x0000d400},


  {0x00054033, 0x0000312d},


  {0x00054034, 0x00006600},


  {0x00054035, 0x0000004d},


  {0x00054036, 0x0000004a},


  {0x00054037, 0x00001600},


  {0x00054038, 0x0000d400},


  {0x00054039, 0x0000312d},


  {0x0005403a, 0x00006600},


  {0x0005403b, 0x0000004d},


  {0x0005403c, 0x0000004a},


  {0x0005403d, 0x00002e00},


  {0x0005403e, 0x00000000},


  {0x0005403f, 0x00000000},


  {0x00054040, 0x00000000},


  {0x00054041, 0x00000000},


  {0x00054042, 0x00000000},


  {0x00054043, 0x00000000},


  {0x00054044, 0x00000000},


  {0x000d0000, 0x00000001},



+};



+/* DRAM PHY init engine image */
+struct dram_cfg_param ddr_phy_pie[] = {

  {0xd0000, 0x0},


  {0x90000, 0x10},


  {0x90001, 0x400},


  {0x90002, 0x10e},


  {0x90003, 0x0},


  {0x90004, 0x0},


  {0x90005, 0x8},


  {0x90029, 0xb},


  {0x9002a, 0x480},


  {0x9002b, 0x109},


  {0x9002c, 0x8},


  {0x9002d, 0x448},


  {0x9002e, 0x139},


  {0x9002f, 0x8},


  {0x90030, 0x478},


  {0x90031, 0x109},


  {0x90032, 0x0},


  {0x90033, 0xe8},


  {0x90034, 0x109},


  {0x90035, 0x2},


  {0x90036, 0x10},


  {0x90037, 0x139},


  {0x90038, 0xb},


  {0x90039, 0x7c0},


  {0x9003a, 0x139},


  {0x9003b, 0x44},


  {0x9003c, 0x633},


  {0x9003d, 0x159},


  {0x9003e, 0x14f},


  {0x9003f, 0x630},


  {0x90040, 0x159},


  {0x90041, 0x47},


  {0x90042, 0x633},


  {0x90043, 0x149},


  {0x90044, 0x4f},


  {0x90045, 0x633},


  {0x90046, 0x179},


  {0x90047, 0x8},


  {0x90048, 0xe0},


  {0x90049, 0x109},


  {0x9004a, 0x0},


  {0x9004b, 0x7c8},


  {0x9004c, 0x109},


  {0x9004d, 0x0},


  {0x9004e, 0x1},


  {0x9004f, 0x8},


  {0x90050, 0x0},


  {0x90051, 0x45a},


  {0x90052, 0x9},


  {0x90053, 0x0},


  {0x90054, 0x448},


  {0x90055, 0x109},


  {0x90056, 0x40},


  {0x90057, 0x633},


  {0x90058, 0x179},


  {0x90059, 0x1},


  {0x9005a, 0x618},


  {0x9005b, 0x109},


  {0x9005c, 0x40c0},


  {0x9005d, 0x633},


  {0x9005e, 0x149},


  {0x9005f, 0x8},


  {0x90060, 0x4},


  {0x90061, 0x48},


  {0x90062, 0x4040},


  {0x90063, 0x633},


  {0x90064, 0x149},


  {0x90065, 0x0},


  {0x90066, 0x4},


  {0x90067, 0x48},


  {0x90068, 0x40},


  {0x90069, 0x633},


  {0x9006a, 0x149},


  {0x9006b, 0x10},


  {0x9006c, 0x4},


  {0x9006d, 0x18},


  {0x9006e, 0x0},


  {0x9006f, 0x4},


  {0x90070, 0x78},


  {0x90071, 0x549},


  {0x90072, 0x633},


  {0x90073, 0x159},


  {0x90074, 0xd49},


  {0x90075, 0x633},


  {0x90076, 0x159},


  {0x90077, 0x94a},


  {0x90078, 0x633},


  {0x90079, 0x159},


  {0x9007a, 0x441},


  {0x9007b, 0x633},


  {0x9007c, 0x149},


  {0x9007d, 0x42},


  {0x9007e, 0x633},


  {0x9007f, 0x149},


  {0x90080, 0x1},


  {0x90081, 0x633},


  {0x90082, 0x149},


  {0x90083, 0x0},


  {0x90084, 0xe0},


  {0x90085, 0x109},


  {0x90086, 0xa},


  {0x90087, 0x10},


  {0x90088, 0x109},


  {0x90089, 0x9},


  {0x9008a, 0x3c0},


  {0x9008b, 0x149},


  {0x9008c, 0x9},


  {0x9008d, 0x3c0},


  {0x9008e, 0x159},


  {0x9008f, 0x18},


  {0x90090, 0x10},


  {0x90091, 0x109},


  {0x90092, 0x0},


  {0x90093, 0x3c0},


  {0x90094, 0x109},


  {0x90095, 0x18},


  {0x90096, 0x4},


  {0x90097, 0x48},


  {0x90098, 0x18},


  {0x90099, 0x4},


  {0x9009a, 0x58},


  {0x9009b, 0xb},


  {0x9009c, 0x10},


  {0x9009d, 0x109},


  {0x9009e, 0x1},


  {0x9009f, 0x10},


  {0x900a0, 0x109},


  {0x900a1, 0x5},


  {0x900a2, 0x7c0},


  {0x900a3, 0x109},


  {0x40000, 0x811},


  {0x40020, 0x880},


  {0x40040, 0x0},


  {0x40060, 0x0},


  {0x40001, 0x4008},


  {0x40021, 0x83},


  {0x40041, 0x4f},


  {0x40061, 0x0},


  {0x40002, 0x4040},


  {0x40022, 0x83},


  {0x40042, 0x51},


  {0x40062, 0x0},


  {0x40003, 0x811},


  {0x40023, 0x880},


  {0x40043, 0x0},


  {0x40063, 0x0},


  {0x40004, 0x720},


  {0x40024, 0xf},


  {0x40044, 0x1740},


  {0x40064, 0x0},


  {0x40005, 0x16},


  {0x40025, 0x83},


  {0x40045, 0x4b},


  {0x40065, 0x0},


  {0x40006, 0x716},


  {0x40026, 0xf},


  {0x40046, 0x2001},


  {0x40066, 0x0},


  {0x40007, 0x716},


  {0x40027, 0xf},


  {0x40047, 0x2800},


  {0x40067, 0x0},


  {0x40008, 0x716},


  {0x40028, 0xf},


  {0x40048, 0xf00},


  {0x40068, 0x0},


  {0x40009, 0x720},


  {0x40029, 0xf},


  {0x40049, 0x1400},


  {0x40069, 0x0},


  {0x4000a, 0xe08},


  {0x4002a, 0xc15},


  {0x4004a, 0x0},


  {0x4006a, 0x0},


  {0x4000b, 0x625},


  {0x4002b, 0x15},


  {0x4004b, 0x0},


  {0x4006b, 0x0},


  {0x4000c, 0x4028},


  {0x4002c, 0x80},


  {0x4004c, 0x0},


  {0x4006c, 0x0},


  {0x4000d, 0xe08},


  {0x4002d, 0xc1a},


  {0x4004d, 0x0},


  {0x4006d, 0x0},


  {0x4000e, 0x625},


  {0x4002e, 0x1a},


  {0x4004e, 0x0},


  {0x4006e, 0x0},


  {0x4000f, 0x4040},


  {0x4002f, 0x80},


  {0x4004f, 0x0},


  {0x4006f, 0x0},


  {0x40010, 0x2604},


  {0x40030, 0x15},


  {0x40050, 0x0},


  {0x40070, 0x0},


  {0x40011, 0x708},


  {0x40031, 0x5},


  {0x40051, 0x0},


  {0x40071, 0x2002},


  {0x40012, 0x8},


  {0x40032, 0x80},


  {0x40052, 0x0},


  {0x40072, 0x0},


  {0x40013, 0x2604},


  {0x40033, 0x1a},


  {0x40053, 0x0},


  {0x40073, 0x0},


  {0x40014, 0x708},


  {0x40034, 0xa},


  {0x40054, 0x0},


  {0x40074, 0x2002},


  {0x40015, 0x4040},


  {0x40035, 0x80},


  {0x40055, 0x0},


  {0x40075, 0x0},


  {0x40016, 0x60a},


  {0x40036, 0x15},


  {0x40056, 0x1200},


  {0x40076, 0x0},


  {0x40017, 0x61a},


  {0x40037, 0x15},


  {0x40057, 0x1300},


  {0x40077, 0x0},


  {0x40018, 0x60a},


  {0x40038, 0x1a},


  {0x40058, 0x1200},


  {0x40078, 0x0},


  {0x40019, 0x642},


  {0x40039, 0x1a},


  {0x40059, 0x1300},


  {0x40079, 0x0},


  {0x4001a, 0x4808},


  {0x4003a, 0x880},


  {0x4005a, 0x0},


  {0x4007a, 0x0},


  {0x900a4, 0x0},


  {0x900a5, 0x790},


  {0x900a6, 0x11a},


  {0x900a7, 0x8},


  {0x900a8, 0x7aa},


  {0x900a9, 0x2a},


  {0x900aa, 0x10},


  {0x900ab, 0x7b2},


  {0x900ac, 0x2a},


  {0x900ad, 0x0},


  {0x900ae, 0x7c8},


  {0x900af, 0x109},


  {0x900b0, 0x10},


  {0x900b1, 0x10},


  {0x900b2, 0x109},


  {0x900b3, 0x10},


  {0x900b4, 0x2a8},


  {0x900b5, 0x129},


  {0x900b6, 0x8},


  {0x900b7, 0x370},


  {0x900b8, 0x129},


  {0x900b9, 0xa},


  {0x900ba, 0x3c8},


  {0x900bb, 0x1a9},


  {0x900bc, 0xc},


  {0x900bd, 0x408},


  {0x900be, 0x199},


  {0x900bf, 0x14},


  {0x900c0, 0x790},


  {0x900c1, 0x11a},


  {0x900c2, 0x8},


  {0x900c3, 0x4},


  {0x900c4, 0x18},


  {0x900c5, 0xe},


  {0x900c6, 0x408},


  {0x900c7, 0x199},


  {0x900c8, 0x8},


  {0x900c9, 0x8568},


  {0x900ca, 0x108},


  {0x900cb, 0x18},


  {0x900cc, 0x790},


  {0x900cd, 0x16a},


  {0x900ce, 0x8},


  {0x900cf, 0x1d8},


  {0x900d0, 0x169},


  {0x900d1, 0x10},


  {0x900d2, 0x8558},


  {0x900d3, 0x168},


  {0x900d4, 0x70},


  {0x900d5, 0x788},


  {0x900d6, 0x16a},


  {0x900d7, 0x1ff8},


  {0x900d8, 0x85a8},


  {0x900d9, 0x1e8},


  {0x900da, 0x50},


  {0x900db, 0x798},


  {0x900dc, 0x16a},


  {0x900dd, 0x60},


  {0x900de, 0x7a0},


  {0x900df, 0x16a},


  {0x900e0, 0x8},


  {0x900e1, 0x8310},


  {0x900e2, 0x168},


  {0x900e3, 0x8},


  {0x900e4, 0xa310},


  {0x900e5, 0x168},


  {0x900e6, 0xa},


  {0x900e7, 0x408},


  {0x900e8, 0x169},


  {0x900e9, 0x6e},


  {0x900ea, 0x0},


  {0x900eb, 0x68},


  {0x900ec, 0x0},


  {0x900ed, 0x408},


  {0x900ee, 0x169},


  {0x900ef, 0x0},


  {0x900f0, 0x8310},


  {0x900f1, 0x168},


  {0x900f2, 0x0},


  {0x900f3, 0xa310},


  {0x900f4, 0x168},


  {0x900f5, 0x1ff8},


  {0x900f6, 0x85a8},


  {0x900f7, 0x1e8},


  {0x900f8, 0x68},


  {0x900f9, 0x798},


  {0x900fa, 0x16a},


  {0x900fb, 0x78},


  {0x900fc, 0x7a0},


  {0x900fd, 0x16a},


  {0x900fe, 0x68},


  {0x900ff, 0x790},


  {0x90100, 0x16a},


  {0x90101, 0x8},


  {0x90102, 0x8b10},


  {0x90103, 0x168},


  {0x90104, 0x8},


  {0x90105, 0xab10},


  {0x90106, 0x168},


  {0x90107, 0xa},


  {0x90108, 0x408},


  {0x90109, 0x169},


  {0x9010a, 0x58},


  {0x9010b, 0x0},


  {0x9010c, 0x68},


  {0x9010d, 0x0},


  {0x9010e, 0x408},


  {0x9010f, 0x169},


  {0x90110, 0x0},


  {0x90111, 0x8b10},


  {0x90112, 0x168},


  {0x90113, 0x1},


  {0x90114, 0xab10},


  {0x90115, 0x168},


  {0x90116, 0x0},


  {0x90117, 0x1d8},


  {0x90118, 0x169},


  {0x90119, 0x80},


  {0x9011a, 0x790},


  {0x9011b, 0x16a},


  {0x9011c, 0x18},


  {0x9011d, 0x7aa},


  {0x9011e, 0x6a},


  {0x9011f, 0xa},


  {0x90120, 0x0},


  {0x90121, 0x1e9},


  {0x90122, 0x8},


  {0x90123, 0x8080},


  {0x90124, 0x108},


  {0x90125, 0xf},


  {0x90126, 0x408},


  {0x90127, 0x169},


  {0x90128, 0xc},


  {0x90129, 0x0},


  {0x9012a, 0x68},


  {0x9012b, 0x9},


  {0x9012c, 0x0},


  {0x9012d, 0x1a9},


  {0x9012e, 0x0},


  {0x9012f, 0x408},


  {0x90130, 0x169},


  {0x90131, 0x0},


  {0x90132, 0x8080},


  {0x90133, 0x108},


  {0x90134, 0x8},


  {0x90135, 0x7aa},


  {0x90136, 0x6a},


  {0x90137, 0x0},


  {0x90138, 0x8568},


  {0x90139, 0x108},


  {0x9013a, 0xb7},


  {0x9013b, 0x790},


  {0x9013c, 0x16a},


  {0x9013d, 0x1f},


  {0x9013e, 0x0},


  {0x9013f, 0x68},


  {0x90140, 0x8},


  {0x90141, 0x8558},


  {0x90142, 0x168},


  {0x90143, 0xf},


  {0x90144, 0x408},


  {0x90145, 0x169},


  {0x90146, 0xd},


  {0x90147, 0x0},


  {0x90148, 0x68},


  {0x90149, 0x0},


  {0x9014a, 0x408},


  {0x9014b, 0x169},


  {0x9014c, 0x0},


  {0x9014d, 0x8558},


  {0x9014e, 0x168},


  {0x9014f, 0x8},


  {0x90150, 0x3c8},


  {0x90151, 0x1a9},


  {0x90152, 0x3},


  {0x90153, 0x370},


  {0x90154, 0x129},


  {0x90155, 0x20},


  {0x90156, 0x2aa},


  {0x90157, 0x9},


  {0x90158, 0x0},


  {0x90159, 0x400},


  {0x9015a, 0x10e},


  {0x9015b, 0x8},


  {0x9015c, 0xe8},


  {0x9015d, 0x109},


  {0x9015e, 0x0},


  {0x9015f, 0x8140},


  {0x90160, 0x10c},


  {0x90161, 0x10},


  {0x90162, 0x8138},


  {0x90163, 0x10c},


  {0x90164, 0x8},


  {0x90165, 0x7c8},


  {0x90166, 0x101},


  {0x90167, 0x8},


  {0x90168, 0x448},


  {0x90169, 0x109},


  {0x9016a, 0xf},


  {0x9016b, 0x7c0},


  {0x9016c, 0x109},


  {0x9016d, 0x0},


  {0x9016e, 0xe8},


  {0x9016f, 0x109},


  {0x90170, 0x47},


  {0x90171, 0x630},


  {0x90172, 0x109},


  {0x90173, 0x8},


  {0x90174, 0x618},


  {0x90175, 0x109},


  {0x90176, 0x8},


  {0x90177, 0xe0},


  {0x90178, 0x109},


  {0x90179, 0x0},


  {0x9017a, 0x7c8},


  {0x9017b, 0x109},


  {0x9017c, 0x8},


  {0x9017d, 0x8140},


  {0x9017e, 0x10c},


  {0x9017f, 0x0},


  {0x90180, 0x1},


  {0x90181, 0x8},


  {0x90182, 0x8},


  {0x90183, 0x4},


  {0x90184, 0x8},


  {0x90185, 0x8},


  {0x90186, 0x7c8},


  {0x90187, 0x101},


  {0x90006, 0x0},


  {0x90007, 0x0},


  {0x90008, 0x8},


  {0x90009, 0x0},


  {0x9000a, 0x0},


  {0x9000b, 0x0},


  {0xd00e7, 0x400},


  {0x90017, 0x0},


  {0x9001f, 0x29},


  {0x90026, 0x6a},


  {0x400d0, 0x0},


  {0x400d1, 0x101},


  {0x400d2, 0x105},


  {0x400d3, 0x107},


  {0x400d4, 0x10f},


  {0x400d5, 0x202},


  {0x400d6, 0x20a},


  {0x400d7, 0x20b},


  {0x2003a, 0x2},


  {0x2000b, 0x64},


  {0x2000c, 0xc8},


  {0x2000d, 0x7d0},


  {0x2000e, 0x2c},


  {0x12000b, 0xc},


  {0x12000c, 0x19},


  {0x12000d, 0xfa},


  {0x12000e, 0x10},


  {0x22000b, 0x3},


  {0x22000c, 0x6},


  {0x22000d, 0x3e},


  {0x22000e, 0x10},


  {0x9000c, 0x0},


  {0x9000d, 0x173},


  {0x9000e, 0x60},


  {0x9000f, 0x6110},


  {0x90010, 0x2152},


  {0x90011, 0xdfbd},


  {0x90012, 0x2060},


  {0x90013, 0x6152},


  {0x20010, 0x5a},


  {0x20011, 0x3},


  {0x40080, 0xe0},


  {0x40081, 0x12},


  {0x40082, 0xe0},


  {0x40083, 0x12},


  {0x40084, 0xe0},


  {0x40085, 0x12},


  {0x140080, 0xe0},


  {0x140081, 0x12},


  {0x140082, 0xe0},


  {0x140083, 0x12},


  {0x140084, 0xe0},


  {0x140085, 0x12},


  {0x240080, 0xe0},


  {0x240081, 0x12},


  {0x240082, 0xe0},


  {0x240083, 0x12},


  {0x240084, 0xe0},


  {0x240085, 0x12},


  {0x400fd, 0xf},


  {0x10011, 0x1},


  {0x10012, 0x1},


  {0x10013, 0x180},


  {0x10018, 0x1},


  {0x10002, 0x6209},


  {0x100b2, 0x1},


  {0x101b4, 0x1},


  {0x102b4, 0x1},


  {0x103b4, 0x1},


  {0x104b4, 0x1},


  {0x105b4, 0x1},


  {0x106b4, 0x1},


  {0x107b4, 0x1},


  {0x108b4, 0x1},


  {0x11011, 0x1},


  {0x11012, 0x1},


  {0x11013, 0x180},


  {0x11018, 0x1},


  {0x11002, 0x6209},


  {0x110b2, 0x1},


  {0x111b4, 0x1},


  {0x112b4, 0x1},


  {0x113b4, 0x1},


  {0x114b4, 0x1},


  {0x115b4, 0x1},


  {0x116b4, 0x1},


  {0x117b4, 0x1},


  {0x118b4, 0x1},


  {0x20089, 0x1},


  {0x20088, 0x19},


  {0xc0080, 0x2},


  {0xd0000, 0x1},



+};



+struct dram_fsp_msg ddr_dram_fsp_msg[] = {

  {


          /* P0 3200mts 1D */


          .drate = 3200,


          .fw_type = FW_1D_IMAGE,


          .fsp_cfg = ddr_fsp0_cfg,


          .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),


  },


  {


          /* P1 400mts 1D */


          .drate = 400,


          .fw_type = FW_1D_IMAGE,


          .fsp_cfg = ddr_fsp1_cfg,


          .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),


  },


  {


          /* P2 100mts 1D */


          .drate = 100,


          .fw_type = FW_1D_IMAGE,


          .fsp_cfg = ddr_fsp2_cfg,


          .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),


  },


  {


          /* P0 3200mts 2D */


          .drate = 3200,


          .fw_type = FW_2D_IMAGE,


          .fsp_cfg = ddr_fsp0_2d_cfg,


          .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),


  },



+};



+/* ddr timing config params */
+struct dram_timing_info dram_timing = {

  .ddrc_cfg = ddr_ddrc_cfg,


  .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),


  .ddrphy_cfg = ddr_ddrphy_cfg,


  .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),


  .fsp_msg = ddr_dram_fsp_msg,


  .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),


  .ddrphy_trained_csr = ddr_ddrphy_trained_csr,


  .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),


  .ddrphy_pie = ddr_phy_pie,


  .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),


  .fsp_table = { 3200, 400, 100, },



+};
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
new file mode 100644
index 0000000000..1b8a971c79
--- /dev/null
+++ b/configs/imx8mn_evk_defconfig
@@ -0,0 +1,80 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0xD000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_TEXT_BASE=0x912000
+CONFIG_TARGET_IMX8MN_EVK=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
+CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk"
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-
imx/imx8m/imximage-8mn-lpddr4.cfg"
+CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot=> "
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_ERASEENV=y
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MN=y
+CONFIG_CLK_IMX8MN=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_ESDHC_IMX=y
+CONFIG_PHYLIB=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+CONFIG_IMX_WATCHDOG=y
2.28.0
-- andrey

    

RE: [PATCH 07/13] imx: imx8mn: add i.MX8MN LPDDR4 EVK support

ZHIZHIKIN Andrey

Signed-off-by: Peng Fan peng.fan@nxp.com

+CONFIG_IMX_WATCHDOG=y