Re: [U-Boot] [PATCH v4 1/6] nand: Try to align the default buffers

Dear Tom Warren,

Marek,

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-----Original Message----- From: Marek Vasut [mailto:marex@denx.de] Sent: Friday, September 07, 2012 11:43 AM To: u-boot@lists.denx.de Cc: Tom Warren; Simon Glass; Scott Wood Subject: Re: [U-Boot] [PATCH v4 1/6] nand: Try to align the default buffers

Dear Tom Warren,

...

Simon,

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-----Original Message----- From: Simon Glass [mailto:sjg@chromium.org] Sent: Sunday, July 29, 2012 11:53 PM To: U-Boot Mailing List Cc: Tom Warren; Stephen Warren; Scott Wood; Simon Glass Subject: [PATCH v4 1/6] nand: Try to align the default buffers

The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2:

• Add new patch to align default buffers in nand_base

drivers/mtd/nand/nand_base.c | 3 ++- include/linux/mtd/nand.h | 7 ++++--- 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index bfd668f..891af1f 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2936,7 +2936,8 @@ int nand_scan_tail(struct mtd_info *mtd)

struct nand_chip *chip = mtd->priv;

if (!(chip->options & NAND_OWN_BUFFERS))

• chip->buffers = kmalloc(sizeof(*chip->buffers), 
  

GFP_KERNEL);

...

...

...

• chip->buffers = memalign(ARCH_DMA_MINALIGN,
  

• 			 sizeof(*chip->buffers));
  
  

  if (!chip->buffers)

  return -ENOMEM;

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 82704de..dc839e7 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -391,9 +391,10 @@ struct nand_ecc_ctrl {

• consecutive order.

*/

struct nand_buffers {

• uint8_t ecccalc[NAND_MAX_OOBSIZE];
• uint8_t ecccode[NAND_MAX_OOBSIZE];
• uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];

• uint8_t ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
• uint8_t ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
• uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE,

• 	      ARCH_DMA_MINALIGN)];
  
  

};

include asm/cache.h or something ?

Thanks, Marek. Mxs_nand.c appears to be 99% yours (and you're listed as the maintainer of m28evk) - would you be willing to submit a patch? That'll also fix apx4devkit, which fails w/the same errors.

I think it's simple enough, just mising one common define. Generate the patch and I'll ack it :)

Tom

[...]

Best regards, Marek Vasut