[U-Boot] [PATCH 2/3] fsl_esdhc: Fix max clock frequency

From: Jerry Huang Changm-Ming.Huang@freescale.com

The max clock of MMC is 52MHz

Signed-off-by: Jerry Huang Changm-Ming.Huang@freescale.com --- drivers/mmc/fsl_esdhc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 73d5cd3..7bab2f6 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;

mmc->f_min = 400000; - mmc->f_max = MIN(gd->sdhc_clk, 50000000); + mmc->f_max = MIN(gd->sdhc_clk, 52000000);

mmc_register(mmc);