From: Ye Li ye.li@nxp.com
Current codes only ennable the PER clock. However on iMX8 the LPUART also needs IPG clock which is an LPCG. Should not depend on the default LPCG setting.
Signed-off-by: Ye Li ye.li@nxp.com Reviewed-by: Peng Fan peng.fan@nxp.com Signed-off-by: Sébastien Szymanski sebastien.szymanski@armadeus.com ---
This commit comes from downstream U-Boot: https://github.com/nxp-imx/uboot-imx/commit/16aa73211a260c6f04d489ff8aa3476c...
drivers/serial/serial_lpuart.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 51e66abdbc15..ce08a6b4486c 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -480,18 +480,30 @@ static int lpuart_serial_probe(struct udevice *dev) { #if CONFIG_IS_ENABLED(CLK) struct clk per_clk; + struct clk ipg_clk; int ret;
ret = clk_get_by_name(dev, "per", &per_clk); if (!ret) { ret = clk_enable(&per_clk); if (ret) { - dev_err(dev, "Failed to get per clk: %d\n", ret); + dev_err(dev, "Failed to enable per clk: %d\n", ret); return ret; } } else { debug("%s: Failed to get per clk: %d\n", __func__, ret); } + + ret = clk_get_by_name(dev, "ipg", &ipg_clk); + if (!ret) { + ret = clk_enable(&ipg_clk); + if (ret) { + dev_err(dev, "Failed to enable ipg clk: %d\n", ret); + return ret; + } + } else { + debug("%s: Failed to get ipg clk: %d\n", __func__, ret); + } #endif
if (is_lpuart32(dev))