Add support for PCIe on MX6 SabreSDP board and enable the support in the config file.
Signed-off-by: Marek Vasut marex@denx.de Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Liu Ying Ying.Liu@freescale.com --- board/freescale/mx6sabresd/mx6sabresd.c | 22 ++++++++++++++++++++++ include/configs/mx6sabresd.h | 9 +++++++++ 2 files changed, 31 insertions(+)
NOTE: Please schedule for 2014.07 and please test properly with _AND_ without PCIe card.
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 12d8c56..8305414 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -135,6 +135,27 @@ static void setup_spi(void) imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); }
+#ifdef CONFIG_CMD_PCI +iomux_v3_cfg_t const pcie_pads[] = { + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */ + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ +}; + +static void setup_pcie(void) +{ + imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); + + /* Power down the PCIe slot */ + gpio_direction_output(IMX_GPIO_NR(3, 19), 0); + mdelay(25); + /* Power up the PCIe slot */ + gpio_set_value(IMX_GPIO_NR(3, 19), 1); + mdelay(25); +} +#else +static inline void setup_pcie(void) {} +#endif + iomux_v3_cfg_t const di0_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* DISP0_HSYNC */ @@ -454,6 +475,7 @@ int overwrite_console(void) int board_eth_init(bd_t *bis) { setup_iomux_enet(); + setup_pcie();
return cpu_eth_init(bis); } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 4919f53..8b94310 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -48,4 +48,13 @@ #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI
+#define CONFIG_CMD_PCI +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#endif + #endif /* __MX6QSABRESD_CONFIG_H */