4 May
2023
4 May
'23
3:18 p.m.
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass sjg@chromium.org wrote:
When coreboot does not pass a UART in its sysinfo struct, there is no easy way to find it out.
Since coreboot does not actually init the serial device when serial is disabled, it is not possible to make it add this information to the sysinfo table.
Add a way to obtain this information from the DBG2 ACPI table, which is normally set up by coreboot.
For now this only supports a memory-mapped 16550-style UART.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v3:
- Disable for coreboot64 since ACPI is not available
Changes in v2:
- Add new patch to allow locating the UART from ACPI tables
drivers/serial/Kconfig | 10 +++ drivers/serial/serial_coreboot.c | 114 ++++++++++++++++++++++++++++--- 2 files changed, 116 insertions(+), 8 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com