HI, Shawn
2010/10/25 Shawn Guo shawn.gsc@gmail.com:
i.mx51 internal RAM starts from 0x1FFE0000 than 0x1FFE8000
Correctly speaking, i.mx51 TO1 SCCv2 RAM strart from 0x1FF80000 TO3 should be starting from 0x1FFE0000 Maybe you need fix the commit log and state it clearly.
Signed-off-by: Shawn Guo shawn.gsc@gmail.com
arch/arm/include/asm/arch-mx5/imx-regs.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 3ddda40..bcab3db 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -26,7 +26,7 @@ /* * IRAM */ -#define IRAM_BASE_ADDR 0x1FFE8000 /* internal ram */ +#define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ /* * Graphics Memory of GPU */ -- 1.7.1
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