Hi,
On 5 February 2015 at 14:16, Dinh Nguyen dinguyen@opensource.altera.com wrote:
On 01/14/2015 05:54 PM, Marek Vasut wrote:
On Wednesday, January 14, 2015 at 05:40:53 PM, dinguyen@opensource.altera.com wrote:
From: Dinh Nguyen dinguyen@opensource.altera.com
s_init will map SDRAM to 0x0.
Signed-off-by: Dinh Nguyen dinguyen@opensource.altera.com
Hi!
[...]
+void s_init(void) +{ +#ifdef CONFIG_SPL_BUILD
- struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;- unsigned long reg;
- /*
* First C code to run. Clear fake OCRAM ECC first as SBE* and DBE might triggered during power on*/- reg = readl(&sysmgr_regs->eccgrp_ocram);
- if (reg & SYSMGR_ECC_OCRAM_SERR)
writel(SYSMGR_ECC_OCRAM_SERR | SYSMGR_ECC_OCRAM_EN,&sysmgr_regs->eccgrp_ocram);- if (reg & SYSMGR_ECC_OCRAM_DERR)
writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN,&sysmgr_regs->eccgrp_ocram);+#else
- /*
* Private components security* U-Boot : configure private timer, global timer and cpu* component access as non secure for kernel stage (as required* by kernel)*/- setbits_le32(SOCFPGA_SCU_SNSAC, 0xfff);
We do this in socfpga/misc.c in arch_early_init_r() already. You should consolidate this code so we don't have it twice I think.
Yes, this can be removed.
+#endif /* CONFIG_SPL_BUILD */
- /* Configure the L2 controller to make SDRAM start at 0 */
- writel(0x1, (SOCFPGA_MPUL2_ADDRESS + SOCFPGA_MPUL2_ADRFLTR_START));
This as well.
This call has to stay because we want to map the SDRAM to 0x0 in the SPL. The call in arch_early_init_r() is in u-boot, and thus is too late.
Can it be done in SPL's board_init_f()?
See these two patches for background.
http://patchwork.ozlabs.org/patch/432861/ http://patchwork.ozlabs.org/patch/423789/
[snip]
Regards, Simon