Hi Jagan
On 3/15/21 6:32 PM, Jagan Teki wrote:
Engicam i.Core STM32MP1 SODIMM SoM has mounted 1x4Gb DDR3 which has 32bits width 528000Khz frequency.
Add DDR configuration via dtsi.
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Changes for v2:
collect Patrice r-b
.../stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi | 119 ++++++++++++++++++ 1 file changed, 119 insertions(+) create mode 100644 arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi
diff --git a/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi new file mode 100644 index 0000000000..1a45c6fc63 --- /dev/null +++ b/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/*
- Copyright (C) 2015-2018, STMicroelectronics - All Rights Reserved
- */
+/*
- File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs
- DDR type: DDR3 / DDR3L
- DDR width: 32bits
- DDR density: 4Gb
- System frequency: 528000Khz
- Relaxed Timing Mode: false
- Address mapping type: RBC
- Save Date: 2019.05.14, save Time: 11:25:16
- */
+#define DDR_MEM_COMPATIBLE ddr3-icore-1066-888-bin-g-1x4gb-528mhz +#define DDR_MEM_NAME "DDR3-DDR3L 32bits 528000Khz"
cosmetic: you can replace Khz by kHz
(see commit "ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz")
This modification is also requested in CubeMX for generation file.
Reviewed-by: Patrick Delaunay patrick.delaunay@foss.st.com
Thanks Patrick