From: Rick Chen rick@andestech.com
Find the UCLASS_CACHE driver to configure the cache controller's settings.
Signed-off-by: Rick Chen rick@andestech.com Cc: Greentime Hu greentime@andestech.com Cc: KC Lin kclin@andestech.com --- board/AndesTech/ax25-ae350/ax25-ae350.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 3d65ce7..448ab0c 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -11,6 +11,7 @@ #include <linux/io.h> #include <faraday/ftsmc020.h> #include <fdtdec.h> +#include <dm.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -93,10 +94,18 @@ int smc_init(void) return 0; }
+void v5l2_init(void) +{ + struct udevice *dev; + + uclass_get_device(UCLASS_CACHE, 0, &dev); +} + #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { smc_init(); + v5l2_init();
return 0; }