Re: [PATCH v6 057/102] x86: Add an option to control the position of SPL

On Sat, Dec 7, 2019 at 12:49 PM Simon Glass sjg@chromium.org wrote:

For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different location from where SPL must be placed in ROM. In other words, although SPL runs before SDRAM is set up, it is not execute-in-place (XIP).

Add a Kconfig option for the ROM position.

Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Bin Meng bmeng.cn@gmail.com

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Changes in v6: None Changes in v5: None Changes in v4:

• apollolake -> Apollo Lake

Changes in v3:

• Add SPL condition to the option

Changes in v2: None

arch/x86/Kconfig | 5 +++++ arch/x86/dts/u-boot.dtsi | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-)

applied to u-boot-x86/next, thanks!