On 4/25/19 10:32 AM, Niel Fourie wrote:
Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec phyBOARD-Wega AM335x.
CPU : AM335X-GP rev 2.1 Model: Phytec AM335x phyBOARD-WEGA DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0 eth0: ethernet@4a100000
Working:
- Eth0
- i2C
- MMC/SD
- NAND
- UART
- USB (host)
The Linux commit from which the DTs came is missing.
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diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 500df1aa11..d6b0ea2246 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -156,6 +156,13 @@ config TARGET_ETAMIN select DM_SERIAL imply CMD_DM
+config TARGET_PHYCORE_AM335X_R2
- bool "Support phyCORE AM335X R2"
- select DM
- select DM_GPIO
- select DM_SERIAL
- imply CMD_DM
Keep the list sorted alphabetically please. (PHY... is below PCM...)
config TARGET_PCM051 bool "Support pcm051" select DM diff --git a/board/phytec/phycore_am335x_r2/Kconfig b/board/phytec/phycore_am335x_r2/Kconfig new file mode 100644 index 0000000000..77055e043c --- /dev/null +++ b/board/phytec/phycore_am335x_r2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PHYCORE_AM335X_R2
Just curious , was there ever AM335x_R1 ? Why do we use the _R2 suffix here ?
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diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c new file mode 100644 index 0000000000..ece9edcfbd --- /dev/null +++ b/board/phytec/phycore_am335x_r2/board.c @@ -0,0 +1,262 @@
[...]
+void sdram_init(void) +{
- int ram_type_index = PHYCORE_R2_MT41K128M16JT_256MB;
- if (fdtdec_setup_mem_size_base())
gd->ram_size = SZ_256M;
Nice
- switch (gd->ram_size) {
- case SZ_1G:
ram_type_index = PHYCORE_R2_MT41K512M16HA125IT_1024MB;break;- case SZ_512M:
ram_type_index = PHYCORE_R2_MT41K256M16TW107IT_512MB;break;- case SZ_256M:
- default:
ram_type_index = PHYCORE_R2_MT41K128M16JT_256MB;
Add a missing "break;" here for completeness.
- }
- config_ddr(DDR_CLK_MHZ, &ioregs,
&physom_timings[ram_type_index].ddr3_data,&ddr3_cmd_ctrl_data,&physom_timings[ram_type_index].ddr3_emif_reg_data, 0);+}
+const struct dpll_params *get_dpll_mpu_params(void) +{
- int ind = get_sys_clk_index();
- int freq = am335x_get_efuse_mpu_max_freq(cdev);
- switch (freq) {
- case MPUPLL_M_1000:
return &dpll_mpu_opp[ind][5];- case MPUPLL_M_800:
return &dpll_mpu_opp[ind][4];- case MPUPLL_M_720:
return &dpll_mpu_opp[ind][3];- case MPUPLL_M_600:
return &dpll_mpu_opp[ind][2];- case MPUPLL_M_500:
return &dpll_mpu_opp100;- case MPUPLL_M_300:
return &dpll_mpu_opp[ind][0];- }
- return &dpll_mpu_opp[ind][0];
+}
+void scale_vcores_generic(int freq) +{
- int sil_rev, mpu_vdd;
- /*
* We use a TPS65910 PMIC. For all MPU frequencies we support we use a* CORE voltage of 1.10V. For MPU voltage we need to switch based on* the frequency we are running at.*/+#ifndef CONFIG_DM_I2C
CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return;+#else
- if (power_tps65910_init(0))
return;+#endif
- /*
* Depending on MPU clock and PG we will need a different* VDD to drive at that speed.*/- sil_rev = readl(&cdev->deviceid) >> 28;
- mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, freq);
- /* Tell the TPS65910 to use i2c */
- tps65910_set_i2c_control();
- /* First update MPU voltage. */
- if (tps65910_voltage_update(MPU, mpu_vdd))
return;- /* Second, update the CORE voltage. */
- if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_0))
return;+}
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diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h new file mode 100644 index 0000000000..a512de8838 --- /dev/null +++ b/include/configs/phycore_am335x_r2.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- phycore_am335x_r2.h
- Phytec phyCORE-AM335x R2 (pcl060) boards information header
- Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
- Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH
- Copyright (C) 2019 DENX Software Engineering GmbH
- */
+#ifndef __CONFIG_PHYCORE_AM335x_R2_H +#define __CONFIG_PHYCORE_AM335x_R2_H
+#include <configs/ti_am335x_common.h>
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Use SZ_128K macro
+#define CONFIG_MACH_TYPE MACH_TYPE_SBC_PHYCORE_AM335X +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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+/* Clock Defines */
s/Defines/Macros/
+#define V_OSCK 25000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK)
Drop parenthesis around V_OSCK, it's just a value.
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