From: Alex Dubov oakad@yahoo.com
Board specific ddr options are moved to the main board configuration file. Common DIMM enumeration code is factored out.
Signed-off-by: Alex Dubov oakad@yahoo.com --- board/stx/common/Makefile | 1 + board/stx/common/ddr.c | 43 +++++++++++++++++++++++++ board/stx/stxgp3/Makefile | 1 - board/stx/stxgp3/ddr.c | 76 --------------------------------------------- board/stx/stxgp3/stxgp3.c | 33 +++++++++++++++++++ board/stx/stxssa/Makefile | 1 - board/stx/stxssa/ddr.c | 76 --------------------------------------------- board/stx/stxssa/stxssa.c | 33 +++++++++++++++++++ 8 files changed, 110 insertions(+), 154 deletions(-) create mode 100644 board/stx/common/ddr.c delete mode 100644 board/stx/stxgp3/ddr.c delete mode 100644 board/stx/stxssa/ddr.c
diff --git a/board/stx/common/Makefile b/board/stx/common/Makefile index 73c6e46..b80570c 100644 --- a/board/stx/common/Makefile +++ b/board/stx/common/Makefile @@ -30,6 +30,7 @@ endif LIB = $(obj)lib$(VENDOR).a
COBJS-${CONFIG_MPC85xx} += law.o +COBJS-${CONFIG_MPC85xx} += ddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/stx/common/ddr.c b/board/stx/common/ddr.c new file mode 100644 index 0000000..401f632 --- /dev/null +++ b/board/stx/common/ddr.c @@ -0,0 +1,43 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <i2c.h> + +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> + +static void +get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address) +{ + i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t)); +} + + +unsigned int +fsl_ddr_get_mem_data_rate(void) +{ + return get_ddr_freq(0); +} + + +void +fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd, + unsigned int ctrl_num) +{ + unsigned int i; + unsigned int i2c_address = 0; + + for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { + if (ctrl_num == 0 && i == 0) { + i2c_address = SPD_EEPROM_ADDRESS; + } + get_spd(&(ctrl_dimms_spd[i]), i2c_address); + } +} + diff --git a/board/stx/stxgp3/Makefile b/board/stx/stxgp3/Makefile index 0aae375..528fa2a 100644 --- a/board/stx/stxgp3/Makefile +++ b/board/stx/stxgp3/Makefile @@ -28,7 +28,6 @@ LIB = $(obj)lib$(BOARD).a COBJS-y += $(BOARD).o COBJS-y += tlb.o COBJS-y += flash.o -COBJS-$(CONFIG_FSL_DDR1) += ddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/stx/stxgp3/ddr.c b/board/stx/stxgp3/ddr.c deleted file mode 100644 index 93d1100..0000000 --- a/board/stx/stxgp3/ddr.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. - */ - -#include <common.h> -#include <i2c.h> - -#include <asm/fsl_ddr_sdram.h> -#include <asm/fsl_ddr_dimm_params.h> - -static void -get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address) -{ - i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t)); -} - - -unsigned int -fsl_ddr_get_mem_data_rate(void) -{ - return get_ddr_freq(0); -} - - -void -fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num) -{ - unsigned int i; - unsigned int i2c_address = 0; - - for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { - if (ctrl_num == 0 && i == 0) { - i2c_address = SPD_EEPROM_ADDRESS; - } - get_spd(&(ctrl_dimms_spd[i]), i2c_address); - } -} - -void fsl_ddr_board_options(memctl_options_t *popts, - dimm_params_t *pdimm, - unsigned int ctrl_num) -{ - /* - * Factors to consider for CPO: - * - frequency - * - ddr1 vs. ddr2 - */ - popts->cpo_override = 0; - - /* - * Factors to consider for write data delay: - * - number of DIMMs - * - * 1 = 1/4 clock delay - * 2 = 1/2 clock delay - * 3 = 3/4 clock delay - * 4 = 1 clock delay - * 5 = 5/4 clock delay - * 6 = 3/2 clock delay - */ - popts->write_data_delay = 3; - - /* 2T timing enable */ - popts->twoT_en = 1; - - /* - * Factors to consider for half-strength driver enable: - * - number of DIMMs installed - */ - popts->half_strength_driver_enable = 0; -} diff --git a/board/stx/stxgp3/stxgp3.c b/board/stx/stxgp3/stxgp3.c index 3804fe0..3f626c1 100644 --- a/board/stx/stxgp3/stxgp3.c +++ b/board/stx/stxgp3/stxgp3.c @@ -35,6 +35,7 @@ #include <asm/mmu.h> #include <asm/immap_85xx.h> #include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> #include <ioports.h> #include <asm/io.h> #include <spd_sdram.h> @@ -307,6 +308,38 @@ initdram (int board_type) return dram_size; }
+void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 0; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* 2T timing enable */ + popts->twoT_en = 1; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +}
#if defined(CONFIG_SYS_DRAM_TEST) int testdram (void) diff --git a/board/stx/stxssa/Makefile b/board/stx/stxssa/Makefile index 432d4b4..d05a72b 100644 --- a/board/stx/stxssa/Makefile +++ b/board/stx/stxssa/Makefile @@ -27,7 +27,6 @@ LIB = $(obj)lib$(BOARD).a
COBJS-y += $(BOARD).o COBJS-y += tlb.o -COBJS-$(CONFIG_FSL_DDR1) += ddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/stx/stxssa/ddr.c b/board/stx/stxssa/ddr.c deleted file mode 100644 index 93d1100..0000000 --- a/board/stx/stxssa/ddr.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. - */ - -#include <common.h> -#include <i2c.h> - -#include <asm/fsl_ddr_sdram.h> -#include <asm/fsl_ddr_dimm_params.h> - -static void -get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address) -{ - i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t)); -} - - -unsigned int -fsl_ddr_get_mem_data_rate(void) -{ - return get_ddr_freq(0); -} - - -void -fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num) -{ - unsigned int i; - unsigned int i2c_address = 0; - - for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { - if (ctrl_num == 0 && i == 0) { - i2c_address = SPD_EEPROM_ADDRESS; - } - get_spd(&(ctrl_dimms_spd[i]), i2c_address); - } -} - -void fsl_ddr_board_options(memctl_options_t *popts, - dimm_params_t *pdimm, - unsigned int ctrl_num) -{ - /* - * Factors to consider for CPO: - * - frequency - * - ddr1 vs. ddr2 - */ - popts->cpo_override = 0; - - /* - * Factors to consider for write data delay: - * - number of DIMMs - * - * 1 = 1/4 clock delay - * 2 = 1/2 clock delay - * 3 = 3/4 clock delay - * 4 = 1 clock delay - * 5 = 5/4 clock delay - * 6 = 3/2 clock delay - */ - popts->write_data_delay = 3; - - /* 2T timing enable */ - popts->twoT_en = 1; - - /* - * Factors to consider for half-strength driver enable: - * - number of DIMMs installed - */ - popts->half_strength_driver_enable = 0; -} diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 73dddf3..a00087d 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -35,6 +35,7 @@ #include <asm/mmu.h> #include <asm/immap_85xx.h> #include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> #include <ioports.h> #include <asm/io.h> #include <spd_sdram.h> @@ -324,6 +325,38 @@ initdram (int board_type) return dram_size; }
+void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 0; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* 2T timing enable */ + popts->twoT_en = 1; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +}
#if defined(CONFIG_SYS_DRAM_TEST) int testdram (void)