From: Anurag Kumar Vulisha anurag.kumar.vulisha@xilinx.com
This patch adds the ZynqMP GT core device-tree properties for zynqmp.dtsi file.
Signed-off-by: Anurag Kumar Vulisha anuragku@xilinx.com Tested-by: Hyun Kwon hyunk@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b796c34449e4..edfa03ac678f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -688,6 +688,29 @@ interrupt-names = "alarm", "sec"; };
+ serdes: zynqmp_phy@fd400000 { + compatible = "xlnx,zynqmp-psgtr"; + status = "disabled"; + reg = <0x0 0xfd400000 0x40000>, + <0x0 0xfd3d0000 0x1000>, + <0x0 0xfd1a0000 0x1000>, + <0x0 0xff5e0000 0x1000>; + reg-names = "serdes", "siou", "fpd", "lpd"; + xlnx,tx_termination_fix; + lane0: lane0 { + #phy-cells = <4>; + }; + lane1: lane1 { + #phy-cells = <4>; + }; + lane2: lane2 { + #phy-cells = <4>; + }; + lane3: lane3 { + #phy-cells = <4>; + }; + }; + sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled";