
16 Oct
2020
16 Oct
'20
2:41 p.m.
any thoughts?
On 14/10/20, Jorge Ramirez-Ortiz wrote:
In order to be able to run the I2C bus at 400Khz, the chip errata[1] recommends that the peripheral clock runs out of the 24MHz oscillator.
[1] Rev 2, 10/2019, ERR007805
Signed-off-by: Jorge Ramirez-Ortiz jorge@foundries.io
arch/arm/mach-imx/mx6/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index e129286065..1da250bbcd 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -469,7 +469,7 @@ int arch_cpu_init(void) }
/* Set perclk to source from OSC 24MHz */
- if (is_mx6sl())
if (is_mx6sl() || is_mx6ull()) setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */
-- 2.17.1