The sh7757lcr has 2GByte eMMC chip. This patch supports it.
Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda.uh@renesas.com --- board/renesas/sh7757lcr/sh7757lcr.c | 5 +++++ doc/README.sh7757lcr | 1 + include/configs/sh7757lcr.h | 11 +++++++++++ 3 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/board/renesas/sh7757lcr/sh7757lcr.c b/board/renesas/sh7757lcr/sh7757lcr.c index a62be24..adae9ce 100644 --- a/board/renesas/sh7757lcr/sh7757lcr.c +++ b/board/renesas/sh7757lcr/sh7757lcr.c @@ -263,6 +263,11 @@ int dram_init(void) return 0; }
+int board_mmc_init(bd_t *bis) +{ + return mmcif_mmc_init(); +} + static int get_sh_eth_mac_raw(unsigned char *buf, int size) { struct spi_flash *spi; diff --git a/doc/README.sh7757lcr b/doc/README.sh7757lcr index 49fea50..a38faee 100644 --- a/doc/README.sh7757lcr +++ b/doc/README.sh7757lcr @@ -12,6 +12,7 @@ The R0P7757LC0030RL(board config name:sh7757lcr) has the following device: - SPI ROM 8MB - 2D Graphic controller - Ethernet controller + - eMMC 2GB
configuration for This board: diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 9799767..55be9aa 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -47,6 +47,10 @@ #define CONFIG_CMD_MD5SUM #define CONFIG_MD5 #define CONFIG_CMD_LOADS +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION
#define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 @@ -119,6 +123,13 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO 1
+/* MMCIF */ +#define CONFIG_MMC 1 +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_SH_MMCIF 1 +#define CONFIG_SH_MMCIF_ADDR 0xffcb0000 +#define CONFIG_SH_MMCIF_CLK 48000000 + /* SH7757 board */ #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000 #define SH7757LCR_GRA_OFFSET 0x1f000000