From: Chee Hong Ang chee.hong.ang@intel.com
Allow U-Boot proper running in non-secure mode (EL2) to invoke SMC call to ATF's PSCI runtime services such as System Manager's registers access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com --- arch/arm/mach-socfpga/include/mach/misc.h | 3 +++ arch/arm/mach-socfpga/misc_s10.c | 20 ++++++++++++++++++++ 2 files changed, 23 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index f6de1cc..b5625e1 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -43,4 +43,7 @@ void do_bridge_reset(int enable, unsigned int mask); void socfpga_pl310_clear(void); void socfpga_get_managers_addr(void);
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) +int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len); +#endif #endif /* _SOCFPGA_MISC_H_ */ diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index a3f5b43..adfff82 100644 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -164,3 +164,23 @@ void do_bridge_reset(int enable, unsigned int mask)
socfpga_bridges_reset(enable); } + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) +int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len) +{ + struct pt_regs regs; + + memset(®s, 0, sizeof(regs)); + regs.regs[0] = func_id; + + if (args) + memcpy(®s.regs[1], &args[0], arg_len * sizeof(u64)); + + smc_call(®s); + + if (ret_arg) + memcpy(&ret_arg[0], ®s.regs[1], ret_len * sizeof(u64)); + + return regs.regs[0]; +} +#endif