From: Huber, Andreas Andreas.Huber@keymile.com
This reads the DIP switch register in the BFTICU (0x40000089). If 'Full reset' or 'DB erase' is selected, 'actual_bank' is set to 0. This loads the Bootloader application who does the erase stuff. To access the register a struct for the bfticu I/O map was added to common.h.
Signed-off-by: Andreas Huber andreas.huber@keymile.com Signed-off-by: Holger Brunck holger.brunck@keymile.com Acked-by: Heiko Schocher hs@denx.de cc: Wolfgang Denk wd@denx.de cc: Detlev Zundel dzu@denx.de cc: Valentin Longchamp valentin.longchamp@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com --- board/keymile/common/common.h | 79 +++++++++++++++++++++++++++++++++++++++++ board/keymile/mgcoge/mgcoge.c | 12 ++++++ 2 files changed, 91 insertions(+), 0 deletions(-)
diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index 099de98..cdc35b6 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -39,6 +39,85 @@ struct km_bec_fpga { unsigned char pgy_eth; };
+#define BFTICU_DIPSWITCH_MASK 0x0f + +/* + * BFTICU FPGA iomap + * BFTICU is used on mgcoge and mgocge3ne + */ +struct bfticu_iomap { + u8 xi_ena; /* General defect enable */ + u8 pack1[3]; + u8 en_csn; + u8 pack2; + u8 safe_mem; + u8 pack3; + u8 id; + u8 pack4; + u8 rev; + u8 build; + u8 p_frc; + u8 p_msk; + u8 pack5[2]; + u8 xg_int; + u8 pack6[15]; + u8 s_conf; + u8 pack7; + u8 dmx_conf12; + u8 pack8; + u8 s_clkslv; + u8 pack9[11]; + u8 d_conf; + u8 d_mask_ca; + u8 d_pll_del; + u8 pack10[16]; + u8 t_conf_ca; + u8 t_mask_ca; + u8 pack11[13]; + u8 m_def0; + u8 m_def1; + u8 m_def2; + u8 m_def3; + u8 m_def4; + u8 m_def5; + u8 m_def_trap0; + u8 m_def_trap1; + u8 m_def_trap2; + u8 m_def_trap3; + u8 m_def_trap4; + u8 m_def_trap5; + u8 m_mask_def0; + u8 m_mask_def1; + u8 m_mask_def2; + u8 m_mask_def3; + u8 m_mask_def4; + u8 m_mask_def5; + u8 m_def_mask0; + u8 m_def_mask1; + u8 m_def_mask2; + u8 m_def_mask3; + u8 m_def_mask4; + u8 m_def_mask5; + u8 m_def_pri; + u8 pack12[11]; + u8 hw_status; + u8 pack13; + u8 hw_control1; + u8 hw_control2; + u8 hw_control3; + u8 pack14[7]; + u8 led_on; /* Leds */ + u8 pack15; + u8 sfp_control; /* SFP modules */ + u8 pack16; + u8 alarm_control; /* Alarm output */ + u8 pack17; + u8 icps; /* ICN clock pulse shaping */ + u8 mswitch; /* Read mode switch */ + u8 pack18[6]; + u8 pb_dbug; +}; + #if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET) #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0 #endif diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index 340016b..11a0f79 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -315,6 +315,18 @@ int board_early_init_r(void)
int last_stage_init(void) { + struct bfticu_iomap *base = + (struct bfticu_iomap *)CONFIG_SYS_FPGA_BASE; + u8 dip_switch; + + dip_switch = in_8(&base->mswitch); + dip_switch &= BFTICU_DIPSWITCH_MASK; + /* dip switch 'full reset' or 'db erase' */ + if (dip_switch & 0x1 || dip_switch & 0x2) { + /* start bootloader */ + puts("DIP: Enabled\n"); + setenv("actual_bank", "0"); + } set_km_env(); return 0; }