The option is never enabled by anyone. Remove the code surrounded by its ifdef. This should be handled by the clock/reset drivers.
CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped at the next resync.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/clk/clk-ld4.c | 6 ------ arch/arm/mach-uniphier/clk/clk-pro4.c | 6 ------ arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 ------ 3 files changed, 18 deletions(-)
diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index def87c1..64fa12e 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -17,9 +17,6 @@ void uniphier_ld4_clk_init(void)
/* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -28,9 +25,6 @@ void uniphier_ld4_clk_init(void)
/* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 8a978d2..09c03cd 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -21,9 +21,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -43,9 +40,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 9775127..27fb2f4 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -19,9 +19,6 @@ void uniphier_pxs2_clk_init(void) #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -45,9 +42,6 @@ void uniphier_pxs2_clk_init(void) tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif