Signed-off-by: Tom Rini trini@konsulko.com --- README | 2 +- drivers/net/sh_eth.c | 8 ++++---- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/README b/README index 0ae3c6b97c15..3eb882c6a248 100644 --- a/README +++ b/README @@ -547,7 +547,7 @@ The following options need to be configured: CONFIG_SH_ETHER Support for Renesas on-chip Ethernet controller
- CONFIG_SH_ETHER_USE_PORT + CFG_SH_ETHER_USE_PORT Define the number of ports to be used
CFG_SH_ETHER_PHY_ADDR diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 9bdc42ced24f..1775d801544c 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -32,8 +32,8 @@
#include "sh_eth.h"
-#ifndef CONFIG_SH_ETHER_USE_PORT -# error "Please define CONFIG_SH_ETHER_USE_PORT" +#ifndef CFG_SH_ETHER_USE_PORT +# error "Please define CFG_SH_ETHER_USE_PORT" #endif #ifndef CFG_SH_ETHER_PHY_ADDR # error "Please define CFG_SH_ETHER_PHY_ADDR" @@ -635,7 +635,7 @@ int sh_eth_initialize(struct bd_info *bd) memset(dev, 0, sizeof(struct eth_device)); memset(eth, 0, sizeof(struct sh_eth_dev));
- eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port = CFG_SH_ETHER_USE_PORT; eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port); @@ -852,7 +852,7 @@ static int sh_ether_probe(struct udevice *udev)
priv->bus = miiphy_get_dev_by_name(udev->name);
- eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port = CFG_SH_ETHER_USE_PORT; eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port); diff --git a/include/configs/alt.h b/include/configs/alt.h index 283af8a324e3..45918c2af439 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -24,7 +24,7 @@ #define CONFIG_SPI_FLASH_QUAD
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/condor.h b/include/configs/condor.h index 2c9817cf02c5..50c8d1733838 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -14,7 +14,7 @@ /* Environment compatibility */
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/gose.h b/include/configs/gose.h index ed7dd70dd964..7ae0726518da 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024)
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 6a11aa61f0fb..8de4a36e931a 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -17,7 +17,7 @@ #define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
/* Network interface */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 31d0795f07fb..d47d70178ccd 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/lager.h b/include/configs/lager.h index 991fc9020ee0..2577c7a7da67 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/porter.h b/include/configs/porter.h index 3b7dcd8e94b8..1526f470e8e1 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -25,7 +25,7 @@ #define CONFIG_SPI_FLASH_QUAD
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/silk.h b/include/configs/silk.h index 46615c46f6ec..c7346a356542 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -25,7 +25,7 @@ #define CONFIG_SPI_FLASH_QUAD
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/stout.h b/include/configs/stout.h index 3bc569c908a0..910997e08c7e 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -29,7 +29,7 @@ #define CONFIG_SPI_FLASH_QUAD
/* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fa784171f026..36cc068c4473 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -193,7 +193,7 @@ CFG_SH_ETHER_CACHE_INVALIDATE CFG_SH_ETHER_CACHE_WRITEBACK CFG_SH_ETHER_PHY_ADDR CFG_SH_ETHER_PHY_MODE -CONFIG_SH_ETHER_USE_PORT +CFG_SH_ETHER_USE_PORT CONFIG_SH_QSPI_BASE CONFIG_SLIC CONFIG_SMDK5420