6 Mar
2012
6 Mar
'12
1:36 a.m.
Dear Simon Glass,
Hi Puneet,
On Mon, Mar 5, 2012 at 6:46 AM, Puneet Saxena puneets@nvidia.com wrote:
As DMA expects the buffers to be equal and larger then cache lines, This aligns buffers at cacheline.
Signed-off-by: Puneet Saxena puneets@nvidia.com
Tested on Seaboard:
Tested-by: Simon Glass sjg@chromium.org Acked-by: Simon Glass sjg@chromium.org
Guys, I'm very happy that we finally got it here. But the USB framework changed in mainline recently a bit (usb.c was split to usb.c and usb_hub.c). Puneet, can you please adapt your patch and do one last loop?
Thanks in advance!
Best regards, Marek Vasut