Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH] net: ravb: Fix NULL pointer access
On 9/19/20 1:14 PM, Biju Das wrote: [...]
By looking at [1], only this driver is using writeext. [1]https://elixir.bootlin.com/u-boot/v2020.10-rc4/A/ident/writeext
git grep indicates a couple more sites where the writeext is called. But look into the KSZ9031 datasheet, that particular writeext call seems to be setting up RGMII Clock Pad Skew (MMD Address 2, Register 8), and I think there is a matching DT binding to set those up too, rxc-skew-ps and txc- skew-ps I think.
Thanks for the pointers. I checked the configs[2] which uses renesas ravb driver and found that we are defining only rxc-skew-ps in all dts.
since CONFIG DM_ETH is defined it is already picking the value
corresponding to "rxc-skew-ps".
For txc-skew-ps anyway the value is default one. So we don't care.
Are you sure (0xf << 5) | 0x19 is the same as the default value of the clock pad skew register ?
No. As per [1] & [2], the default values for this registers are 0xf [1] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/drivers/net/phy/micrel... [2] http://ww1.microchip.com/downloads/en/devicedoc/00002117f.pdf
if we remove writephyext, by looking the code at [1], rxc-skew-ps will be taken from the device tree[3] and "txc-skew-pc" will be the default value(0xf). [3]https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/arch/arm/dts/salvator-...
I will check this and let you know the results after checking on RCar board. Unfortunately currently I don't have RCar board.
Cheers, Biju
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