28 Jan
2020
28 Jan
'20
1:15 p.m.
On 1/28/20 10:11 AM, Patrick Delaunay wrote:
From: Antonio Borneo antonio.borneo@st.com
LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead cache the value at probe and pretend to use it later.
Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.
Now this looks like a grisly workaround. Can you fix the LTDC driver to do something sane on boards which didn't update bootloader yet ?