From: T Karthik Reddy t.karthik.reddy@xilinx.com
In current implementation dummy buswidth is set equal to address buswidth. In case of quad spi (mode 1-1-4), where address width is 1 the dummy bytes will be calculated to 1(8 dummy cycles) and dummy buswidth is set to 1. Due to this, the controller driver will introduce 8 dummy cycles on data line(D0) during read operation.
But since we are using 4 data lines in case of qspi, we need to change this dummy bus width to 4. This will make dummy bytes to 4 inplace of 1. This will be taken care in controller driver by dividing with dummy buswidth again as in below code, which makes dummy cycles to 8 as earlier.
dummy_cycles = op->dummy.nbytes * 8 / op->dummy.buswidth;
So with this change dummy cycles will be on all data lines(D0-D3) and it is taken care for all the configurations(single, dual, quad and octal).
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@xilinx.com Signed-off-by: T Karthik Reddy t.karthik.reddy@xilinx.com Signed-off-by: Tejas Bhumkar tejas.arvind.bhumkar@amd.com --- drivers/mtd/spi/spi-nor-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 473d9f41f3..8949dab548 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -260,7 +260,7 @@ void spi_nor_setup_op(const struct spi_nor *nor, op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
if (op->dummy.nbytes) - op->dummy.buswidth = spi_nor_get_protocol_addr_nbits(proto); + op->dummy.buswidth = spi_nor_get_protocol_data_nbits(proto);
if (op->data.nbytes) op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);