From: U-Boot u-boot-bounces@lists.denx.de on behalf of Bharat Bhushan Bharat.Bhushan@nxp.com Sent: Monday, January 30, 2017 12:43 PM To: york sun; Z.Q. Hou; M.H. Lian; u-boot@lists.denx.de Cc: albert.u.boot@aribaud.net Subject: [U-Boot] [PATCH 2/3] pcie-layerscape: Define stream-ids for Layerscape Chasis-2
Layerscape Chasis-2 have PCIe device, some platform devices and DPAA1 devices which will use stream-ids for iommu level isolation as they lies behind SMMU.
This patch defines the stream-ids for Chasis-2 devices. stream-ids for DPAA1 are reserved for future use.
Signed-off-by: Bharat Bhushan Bharat.Bhushan@nxp.com
.../asm/arch-fsl-layerscape/stream_id_lsch2.h | 60 ++++++++++++++++++++++ include/configs/ls1043a_common.h | 1 + 2 files changed, 61 insertions(+) create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h new file mode 100644 index 0000000..bdfed83 --- /dev/null +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -0,0 +1,60 @@ +/*
- Copyright 2017 NXP Semiconductor, Inc.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __FSL_STREAM_ID_H +#define __FSL_STREAM_ID_H
+/*
- Stream IDs on ls1043a devices are not hardwired and are
- programmed by sw. There are a limited number of stream IDs
- available, and the partitioning of them is scenario dependent.
- This header defines the partitioning between legacy, PCI,
- and DPAA1 devices.
- This partitioning can be customized in this file depending
- on the specific hardware config:
- -non-PCI legacy, platform devices (USB, SDHC, SATA, DMA, QE etc)
-all legacy devices get a unique stream ID assigned and programmed in
their AMQR registers by u-boot
- -PCIe
-there is a range of stream IDs set aside for PCI in this
file. U-boot will scan the PCI bus and for each device discovered:
-allocate a streamID
-set a PEXn LUT table entry mapping 'requester ID' to 'stream ID'
-set a msi-map entry in the PEXn controller node in the
device tree (see Documentation/devicetree/bindings/pci/pci-msi.txt
for more info on the msi-map definition)
- -DPAA1
- Stream ids for DPAA1 use are reserved for future usecase.
- */
+#define FSL_INVALID_STREAM_ID 0
+/* legacy devices */ +#define FSL_USB1_STREAM_ID 1 +#define FSL_USB2_STREAM_ID 2 +#define FSL_USB3_STREAM_ID 3 +#define FSL_SDHC_STREAM_ID 4 +#define FSL_SATA_STREAM_ID 5 +#define FSL_QE_STREAM_ID 6 +#define FSL_QDMA_STREAM_ID 7 +#define FSL_EDMA_STREAM_ID 8 +#define FSL_ETR_STREAM_ID 9
+/* PCI - programmed in PEXn_LUT */ +#define FSL_PEX_STREAM_ID_START 11 +#define FSL_PEX_STREAM_ID_END 26
+/* DPAA1 - Stream-ID that can be programmed in DPAA1 h/w */ +#define FSL_DPAA1_STREAM_ID_START 27 +#define FSL_DPAA1_STREAM_ID_END 63
+#endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index aa2b6f1..eee6fad 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -13,6 +13,7 @@ #define CONFIG_MP #define CONFIG_GICV2
+#include <asm/arch/stream_id_lsch2.h>
Since the following patch 3/3 enables LUT for all Chassis 2.0 devices, this definition should be included and validated for the other devices too: LS1046A, LS1012A, LS1021A.
#include <asm/arch/config.h>
/* Link Definitions */
1.9.3
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-Mike