Enable the UART0 LPCG clock in board_early_init_f not depending on the reset default value.
Signed-off-by: Ye Li ye.li@nxp.com --- Changes in v2: - New patch in v2, enable the UART0 LPCG since we added LPCG driver
board/freescale/imx8qm_mek/imx8qm_mek.c | 3 +++ board/freescale/imx8qxp_mek/imx8qxp_mek.c | 3 +++ 2 files changed, 6 insertions(+)
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c index e69efc4..083b90a 100644 --- a/board/freescale/imx8qm_mek/imx8qm_mek.c +++ b/board/freescale/imx8qm_mek/imx8qm_mek.c @@ -14,6 +14,7 @@ #include <asm/arch/imx8-pins.h> #include <asm/arch/iomux.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/lpcg.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -52,6 +53,8 @@ int board_early_init_f(void) if (ret) return ret;
+ lpcg_all_clock_on(LPUART_0_LPCG); + setup_iomux_uart();
sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON); diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 63cd605..f9c9c23 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -15,6 +15,7 @@ #include <asm/arch/imx8-pins.h> #include <asm/arch/iomux.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/lpcg.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -58,6 +59,8 @@ int board_early_init_f(void) if (ret) return ret;
+ lpcg_all_clock_on(LPUART_0_LPCG); + setup_iomux_uart();
return 0;