From: Paweł Jarosz paweljarosz3691@gmail.com
The rk3066 grf_soc_con0 allows interchangeable data pin configuration for emmc and nand.
Use rockchip_nand_board_early_init function to config nand data pins in spl as bootrom leaves it in default state.
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Signed-off-by: Johan Jonker jbx6244@gmail.com --- arch/arm/mach-rockchip/rk3066/rk3066.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 78c7d894..1d1b8687 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -28,12 +28,15 @@ void board_debug_uart_init(void)
void spl_board_init(void) { + __maybe_unused struct rk3066_grf * const grf = (void *)GRF_BASE; + if (!IS_ENABLED(CONFIG_SPL_BUILD)) return;
- if (IS_ENABLED(CONFIG_SPL_DM_MMC)) { - struct rk3066_grf * const grf = (void *)GRF_BASE; + if (IS_ENABLED(CONFIG_NAND_BOOT)) + rk_clrreg(&grf->soc_con0, EMMC_FLASH_SEL_MASK);
+ if (IS_ENABLED(CONFIG_SPL_DM_MMC)) { rk_clrsetreg(&grf->gpio3b_iomux, GPIO3B0_MASK | GPIO3B1_MASK | GPIO3B2_MASK | GPIO3B3_MASK | GPIO3B4_MASK | GPIO3B5_MASK |