Signed-off-by: Jens Gehrlein sew_s@tqs.de ---
board/tqc/tqma31/tqma31.c | 13 +++++++++++++ include/asm-arm/arch-mx31/mx31-regs.h | 12 ++++++++++++ include/configs/TQMA31.h | 20 ++++++++++++++++++++ 3 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c index 0c67af3..c704c41 100644 --- a/board/tqc/tqma31/tqma31.c +++ b/board/tqc/tqma31/tqma31.c @@ -55,6 +55,19 @@ static void setup_iomux (void) mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA); mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD); mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD); + + /* Pins for SPI2 */ + mx31_gpio_mux (MUX_CSPI2_MOSI__CSPI2_MOSI); + mx31_gpio_mux (MUX_CSPI2_MISO__CSPI2_MISO); + mx31_gpio_mux (MUX_CSPI2_SS0__CSPI2_SS0_B); + mx31_gpio_mux (MUX_CSPI2_SCLK__CSPI2_CLK); + mx31_pad_ctl (PAD_CTL_CSPI2_SS0, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SS1, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SS2, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SCLK, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SPI_RDY, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_MISO, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0); }
int dram_init (void) diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index c0e516f..4d661e8 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -183,6 +183,11 @@ #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI) #define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
+#define MUX_CSPI2_MOSI__CSPI2_MOSI ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MOSI) +#define MUX_CSPI2_MISO__CSPI2_MISO ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MISO) +#define MUX_CSPI2_SS0__CSPI2_SS0_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS0) +#define MUX_CSPI2_SCLK__CSPI2_CLK ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SCLK) + #define MUX_I2C_CLK__I2C1_SCL ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK) #define MUX_I2C_DAT__I2C1_SDA ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT)
@@ -208,6 +213,13 @@ #define PAD_CTL_IO1_SHIFT 0 #define PAD_CTL_IO2_SHIFT 10 #define PAD_CTL_IO3_SHIFT 20 +#define PAD_CTL_CSPI2_SS2 ((0x1F4 << 8) | PAD_CTL_IO3_SHIFT) +#define PAD_CTL_CSPI2_SCLK ((0x1F4 << 8) | PAD_CTL_IO2_SHIFT) +#define PAD_CTL_CSPI2_SPI_RDY ((0x1F4 << 8) | PAD_CTL_IO1_SHIFT) +#define PAD_CTL_CSPI2_MISO ((0x1F8 << 8) | PAD_CTL_IO3_SHIFT) +#define PAD_CTL_CSPI2_SS0 ((0x1F8 << 8) | PAD_CTL_IO2_SHIFT) +#define PAD_CTL_CSPI2_SS1 ((0x1F8 << 8) | PAD_CTL_IO1_SHIFT) +#define PAD_CTL_CSPI2_MOSI ((0x1FC << 8) | PAD_CTL_IO1_SHIFT) #define PAD_CTL_I2C_CLK ((0x21C << 8) | PAD_CTL_IO2_SHIFT) #define PAD_CTL_I2C_DAT ((0x21C << 8) | PAD_CTL_IO1_SHIFT)
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h index f96fd74..ac81a32 100644 --- a/include/configs/TQMA31.h +++ b/include/configs/TQMA31.h @@ -191,6 +191,24 @@
/******************************************************************************* + * SPI + ******************************************************************************/ + +/* Use the processor internal controller */ +#define CONFIG_HARD_SPI 1 +#define CONFIG_MXC_SPI 1 + +/* 0=CSPI1, 1=CSPI2, 2=CSPI3 */ +#define CONFIG_DEFAULT_SPI_BUS 1 + +/* SCLK polarity: high; chipselect: active high */ +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) + +/* Add PMIC RTC driver */ +#define CONFIG_RTC_MC13783 1 + + +/******************************************************************************* * Commands ******************************************************************************/
@@ -201,6 +219,8 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE
/*******************************************************************************