Hi Matthias,
Matthias Fuchs matthias.fuchs@esd-electronics.com writes:
good work. I gave it a try on our PLU405 board (405EP) with a PCI attached OHCI controller (ISP1561). I had to add a offset to the dma'ed addresses, so that the USB controller can access the correct locations in RAM.
Ok.
CONFIG_PCI_CONFIG_HOST_BRIDGE must be defined and the pciconfighost variable must be set. After this, RAM is accessible at PCI address 0x8000000. I modified drivers/usb_ohci.c to support this offset (CFG_USB_OHCI_DMA_BASE).
I am not sure if there is a better way to get PCI OHCI working with a 405 CPU. U-Boot does not setup the PLB/PCI bridge so that the RAM is accessible at PCI address 0.
And I think that we shouldn't force such a restriction. While your patch doesn't actually augment readability ;-) i guess this is the price we pay for supporting various controllers in one driver.
Could you resend your patch against the updated usb git repo and including a Signed-off line?
Best regards
Markus Klotzbücher
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