12 Oct
2019
12 Oct
'19
5:37 a.m.
Hi Bin,
On Thu, 10 Oct 2019 at 03:50, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass sjg@chromium.org wrote:
Newer Intel SoCs have different ways of setting up cache-as-ram (CAR). Add support for these along with suitable configuration options.
I wonder why do we need do this in U-Boot. Isn't FSP-T doing the CAR for us?
Well actually I have not tried using FSP-T yet on apollolake. I'll see how it looks.
Regards, Simon