On 03/03/2012 05:09 PM, Eric Nelson wrote:
On 03/03/2012 02:00 AM, Stefano Babic wrote:
On 03/03/2012 01:46, Eric Nelson wrote:
This patch requires Stefano's driver for MX5/MX6. http://lists.denx.de/pipermail/u-boot/2012-February/118530.html
This is helpful, but should be not part of the commit message that is stored in git. Move all additional info after the "---" line.
Signed-off-by: Eric Nelsoneric.nelson@boundarydevices.com
arch/arm/include/asm/arch-mx6/imx-regs.h | 11 +++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 54 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 13 ++++++ 3 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3e5c4c2..2441434 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -165,6 +165,17 @@ #define IP2APB_USBPHY1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000) #define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
+/*
- ANATOP register definitions
- */
+#define ANATOP_PLL_LOCK 0x80000000 +#define ANATOP_PLL_ENABLE_MASK 0x00002000 +#define ANATOP_PLL_BYPASS_MASK 0x00010000 +#define ANATOP_PLL_LOCK 0x80000000 +#define ANATOP_PLL_PWDN_MASK 0x00001000 +#define ANATOP_PLL_HOLD_RING_OFF_MASK 0x00000800 +#define ANATOP_SATA_CLK_ENABLE_MASK 0x00100000
There is already a thread initiated by Wolfgang regarding the ANATOP registers:
http://lists.denx.de/pipermail/u-boot/2012-February/117942.html
I think we need in any case a way to consolitate this stuff, even if decided to postpone this activity
Thanks. I saw that but seem to have forgotten it.
Most, if not all, definitions above are already defined in arch/arm/include/asm/arch-mx6/ccm_regs.h including a struct member. Therefore there's also no need for magic offsets.
Wolfgang.