Hi,
This series adds support for octal DTR flashes in the spi-nor framework, and then adds hooks for the Cypress Semper flash which is an xSPI compliant Octal DTR flash.
The Cadence QSPI controller driver is also updated to run in Octal DTR mode.
Tested on TI J721e EVM with 1-bit ECC on the Cypress flash on top of u-boot-ti/next.
This series depends on [0].
[0] cf. 20200224071051.19331-1-p.yadav@ti.com [0] https://lists.denx.de/pipermail/u-boot/2020-February/401192.html
Pratyush Yadav (15): dt-bindings: spi: allow expressing DTR capability spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr" spi: spi-mem: allow specifying whether an op is DTR or not spi: spi-mem: allow specifying a command's extension spi: cadence-qspi: Do not calibrate when device tree sets read delay spi: cadence-qspi: Add support for octal DTR flashes mtd: spi-nor-core: Add a ->setup() hook mtd: spi-nor-core: Move SFDP related declarations to top mtd: spi-nor-core: Introduce flash-specific fixup hooks mtd: spi-nor-core: Add support for DTR protocol mtd: spi-nor-core: Get command opcode extension type from BFPT mtd: spi-nor-core: Parse xSPI Profile 1.0 table mtd: spi-nor-core: Use Read SR dummy cycle and address width from SFDP mtd: spi-nor-core: Enable octal DTR mode when possible mtd: spi-nor-core: Add support for Cypress Semper flash
doc/device-tree-bindings/spi/spi-bus.txt | 4 + drivers/mtd/spi/sf_internal.h | 8 + drivers/mtd/spi/spi-nor-core.c | 804 +++++++++++++++++------ drivers/mtd/spi/spi-nor-ids.c | 1 + drivers/mtd/spi/spi-nor-tiny.c | 22 - drivers/spi/cadence_qspi.c | 59 +- drivers/spi/cadence_qspi.h | 15 +- drivers/spi/cadence_qspi_apb.c | 255 ++++++- drivers/spi/spi-mem.c | 47 ++ drivers/spi/spi-uclass.c | 9 + include/linux/mtd/spi-nor.h | 223 +++++-- include/spi-mem.h | 32 + include/spi.h | 2 + 13 files changed, 1171 insertions(+), 310 deletions(-)
-- 2.25.0